TNP #35 - InPhi 43Gb/s 8Vpp Differential Mach-Zehnder Driver ASIC & Module Teardown & Analysis
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- Опубликовано: 23 авг 2024
- In this episode Shahriar takes a look at a high-speed driver module intended for coherent applications. The Mach-Zehnder driver circuit can reach speeds of 43Gb/s and provide up to 8Vpp into a differential modulator. The ASIC is realized in an InP HBT process and manufactured more than 21 years ago! The teardown shows the interface design as well as detailed circuit analysis & ASIC architecture.
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*Please note, as I also mentioned in the video, that is possible these are InP HEMT device (rather than InP HBTs), although the finger spacing does look strange and non-uniform. This has no impact on the discussions regarding the circuit topologies.*
I'd enjoy a video on how to identify diodes, transistors, resistors, etc on a die like this! That would be a good complement to this video and the ones where you talk about distributed element structures.
Yes!
Google "standard cell library" and go down the rabbit hole from there.
But I agree, some "show-and-tell" videos on this topic would be great!
I'd love to see a more detailed reverse engineering of the on-chip structures. I've been working on getting into IC reverse engineering, and while this is very different from CMOS on silicon, it would still be great to understand.
Agreed I really enjoy when he talks through the different features/geometries and what they do.
I would love to see a video on the full RE of the chip and how it all works! Would also be cool to hear you talk about what the state of the art is today for high slew rate drivers in this space - I'm guessing we're up to 112G by now? Are we still using LiNbO3 stuff on the optical side?
I know the line rates are that high now, I'm just not sure if external modulators kept up or if we fell back on doing direct modulation, like they do with VCSEL in CPO.
@@gsuberland PAM4 as @mmwaveDesign mentions points to non-synchronous, right?
@@pizzablender it still does clock recovery but they mostly replaced the AFE with DSP on modern ASICs.
the IEEE have standardised 112G signalling and this is being used both optically and electrically now. At the OIF we are well on the way to defining 224G and already several vendors have shipped parts. Optically multiple companies offer coherent modulation to 1.2Tb / lambda
You’re treating us with this many videos. Looking forward to it!
On topics like this I would love to see a bit more in depth explanation. Maybe taking some specific parts and breaking it down to the basics. As in this video there where a couple terms that went straight over my head.
Yes, i agree your videos are great to learn from especially the long in depth ones. I like the long really techinical and well explained ones
(like the 256gs/s s.a video or many more)
Going into deeper into the circuit does sound like a lot of fun!
Yes! I would like to see the schematic!
I used to work at GigPeak/IDT we were a competitor of them. This brings back memories of fun times testing. I love your videos.
I like this format, but i definitely prefer longer format videos
I'd love to see a schematic tracing video on this! While i can trace out a normal PCB circuit myself, i'd be really interested how it compares to tracing out an actual IC !
I don't understand a lot about what you talk, but as an hobby electronics engineer i am facinated by this! Keep it comming!
I like learning about these neat devices and how they function internally.
I would definitely enjoy seeing an internal schematic. IC's never cease to blow my mind. :)
Nice video Shahriar
Thanks!
schematic? yes, please! Maybe a whole video about "how to reverse engineer an microwave IC"
a schematic would be sublime ❤️
I would definitely be interested if you went over the schematics. Especially I would be interested to learn how you identify devices and their connections by just looking at the chip under the microscope!
I'm not sure how much it'd be covered by your ASIC knowledge, but it might be interesting to talk about how microwave ASIC design techniques carry over to (pre-)ampflifiers for cutting-edge wide bandgap switching converters (especially resonant ones, both "DC" (w.r.t. the resonances) and HF output ought to be interesting).
Given that they can utilize ZVS with resonances at 13.56 or even 27.12 MHz, the pulses out of the pre-amplifier need to have bandwidths into the hundreds of MHz, which is where the microwave ASIC aspects come to play. Because the transistors there need to be way faster to offer nice gain.
I've actually considered reaching for SRD/PIN diodes to very rapidly commutate turn-off charge into an SiC JFET gate without asking too much bandwidth from the power-gain amplifier (the SRD only provides pulse shaping), because the gate resistance is quite annoying:
higher-voltage pulses, as well as substantial losses (well, if you're aiming at 2~2.5 nines of efficiency of the switching converter after reaching for all the soft-switching opportunities you can grasp, to not burn up the output capacitance stored energy at each turn-on).
But it is my understanding that similar issues in GaN HEMTs caused monolithic integration of the pre-amplifier with the power amplifier due to the substantially reduced gate voltage in those processes (around 5V target, with 6V limit, and around 3.5~5 V necessary to have low-ish restance) and even higher switching speeds, even in hard-switched applications.
E.g., epc-co has some ToF drivers for VCSELs that do input pulse widths of 3ns at repetition frequencies of 100 MHz, as a single-ended low-side-switch for the laser diode.
They do like 40V 5A to the laser, but are technically just general limiting single-ended amplifiers (LVDS and 3.3V CMOS inputs available). Not that they need to do microwave matching at 1.5 by 1 mm die size and these 1~2 GHz bandwidth outputs, but then again, not all preamplifiers for switching-type WBG power amplifiers are exclusively used in limiting mode:
one may want to use linear mode during on-phase to remove harmonics at the output of switched capacitor circuits/control commutation of load current between interleaved phases of multi-phase converters (also for getting rid of harmonics).
Also, JFET gates offer a near-channel diode temperature sensor during overdriven/limiting on-state, if one wants to utilize them (e.g. load balancing in partially-linear-mode applications, to counter thermal runaway/power hogging issues); I think BJTs would do, too.
Thanks for sharing this was super cool!
A video every day? :)
To see how you do the measurements and create the schematics would be quite an interesting video I guess.
In a wild coincidence, I was just talking about high slew rate (>5Vpp, >40GHz) drivers for external optical modulators on Mastodon ten minutes before you posted this. Spooky timing.
Amazing!
8:13 I'm studying EE at the moment, and hope to eventually get to ASIC design
I would love to see you drawing out schematics of dies
I enjoy the longer videos. Just my preference. A schematic would be great!
+1 for schematics !!
I have never seen anything like this, where would this even be used?
Coherent optical links.
OMG!!! 43Gbps!!! That's almost faster than I can key my Morse key!!!
DO you think you could get it to work, after replacing the v conector, though I assume the matching would be no longer perfect, but to see some of the properties when attaching signals.? -- by the way great video.
These were very likely used on proprietary 40 Gb/s fiber optics transmitters, of the Nortel or Ciena likes. So not that experimental, IMO... Thanks!
I wonder if these may have been fabricated by Velocium? They were created by combining the III-V operations of Vitesse, RFMD and TRW into one operation, based in Redondo Beach. They're now part of Northrop Grumman, and apparently Keysight has done business with them.
or GCS
Compared to this "ancient" 43Gb/s and ≤8Vpp driver, what are the specs of today's a) readily available and b) "state of the art" versions?
that micro-dsub connector is about 100 USD
Im pretty interested in analog/rf ic layout, if u could do something explaining that will be nice.
Is there any 3D aspect to the chip and its components?
If you were to tilt the sample slightly, can you see any topology?
For all intents and purposes, ICs older than about ten years are purely 2D structures. More recently there has been development in the z-axis with things like FinFET, etc. but they're still so thin that you would need SEM to see the thickness.
All ASICs are pretty flat and planarized.
Just wondering what was broken…
The V connector. :(
Is there any option to recover the layout + material composition and just simulate the chip by something like a field solver? Or one has to really draw a schematics and use part based simulation methods, if one would like to see how it behaves?
Yes, schematic please
基片槽宽和烧结工艺有什么注意吗？
I'm asking myself what this ciruit is having in common with the Mach-Zehnder interferometer. Is this used driving lasers in a wavelength division multiplexer? I do not understand how. Are there details available anywhere?
This is a very different device than an interferometer. It can be used to drive a Mach-Zehnder modulator.
@@Thesignalpath Well, as I understand, a Mach-Zehnder modulator is nothing else but a Mach-Zehnder interferometer with a controllable phase shifter in the second optical branch in front of the second optical beam splitter/combiner.
For me it would be of great (academic) interest how your parts work..
Why did they use double wiring on the signals? Is it for robustness or for lowering inductance?
It reduces the inductance and makes the interface have a better overall frequency response.
Comment on the intro music: to digitally produced, and by that I mean that it hurts (and is loud), compared to your voice.
I’ll adjust it to be quieter next time.
@@Thesignalpath Thank you for checking this. But I am afraid that the music in itself is hurting. It is made so with digital equipment that distorts certain parts, and makes it impossible to enjoy. Seems to be modern.
How much is the module worth? I'm thinking it would be worth a try repairing it.
Today, probably about $2K. But back in 2002, it could have been ~$30K.
It definitely is not a InP HBT process. The transistors look lateral like HEMTs. So I'm willing to bet it's a GaAs FET process.
I considered it being GaAs, but InPhi rarely ever used GaAs processes, although there were some talks about them using it a while back. The individual devices also come in dual-fingers and you can see that in the spacing of the multi-device arrangements. I will add a note.
First
Congratulations?