I was in a training session with Dave a few years ago. He called the projector remote an "ooferdoofer". I dont think i'll ever forget that. With that said, XJTAG is an awesome tool.
On the many times you've asked "what should I make a new video about?" I should have said: "JTAG!!!" If only I'd thought about it before. GREAT content, Robert. Thank you!!
This video was an eye opening experience, thanks for that!!! I have been procrastinating watching this video because the 2 hours length was off putting, but in the end I can say that it have been awesome to watch the uncut version. So much useful content...
JTAG becomes a truly powerful tool when the chip allows write and read access to all (or at least most) device internal registers and memories over JTAG to internal bus such as AXI bridge. Common thing for debugging complex FPGAs and SoCs, with FPGAs also having internal logic analyzer tools from which sampled data can be read over the same JTAG interface. Usually we would test more complex boards with higher level software and separate test fixtures. Like running DDR memory tests from bootloader and other peripherals from Linux. This allows testing of high speed interfaces at their nominal frequencies. It is also worth noting DDR controllers have comprehensive training and test modes that don't require fast speeds for register writes and reads to run. Its all offloaded to DDR controller hardware. JTAG for initial programming. U-Boot / other bootloaders for DDR testing. Linux for everything else.
Another brilliant vid. I have used XJTAG recently in the exact manner David has sown here. Unfortunately I had to learn most of it on my own. I wish this vid had been done a few months ago :D Cheers Rob
What JTAG adapter can be used with XJtag? And can one adapter (ex. Altera/Intel Usb-Blaster) be used on a board that has a Xilinx FPGA? I've always found it odd that Jtag is a standard for all devices, yet every chip seems to work only with the chip vendor's programmer! How does XJTAG's XJDeveloper / XJInvestigator, compare with other tools.. Navatek JSCAN, JTAG Provision , $100 TopProbe ? Would like to hear more about generating the files needed for XJtag. For example, how do you use Altera/Intel's BSDL Customizer Tool for modifying a bsdl info file based on the .pin/ucf file. Similarly, Xilinx has a BSDLAnno tool for mapping between the specific user design and boundary scan test.
At the beginning it mentions that the chip core is not used during a JTAG debug. So does it mean that the code is executed on the JTAG Host ( PC. Laptop, etc...) ? So all the registers and memory addresses would be fictitious aliases on the host , which are mapped to the architecture of the chip being tested ?
I should definitely look for an open source software similar to the one presented, of course it won't be as comprehensive as this one, but hopefully it will be enough for my needs.
For most I think JTAG just turned into a programing port. Looked at it when it first came out but not many chips that we used had it build in, so we stayed with standard testing methods.
One question which I've always had is how to locate shorts when, for example, you have two BGA's connected to each other? Let's say that JTAG detects a short on a pin under BGA A. Now you know which line has a short, but how do you know if it is under BGA A or BGA B? This has implications for rework. It can be expensive and risky to remove/replace a BGA. Every time you reheat the board you risk creating other problems, so it would be valuable to know which BGA to replace.
Not all CPLDs have them. Some require parallel programming. The programmers are old and obscure, cost hundreds to over a thousand dollars, and can only be run on old machines. The MAX3000 devices for an example, TC devices do not have jtag while STC do.
While JTAG boundary scan is essentially just a glorified shift register, it is still useful for test and programming digital chips. and it has a total market monopoly on this. However, the pricing is set to ensure that only big companies can use it to get even richer, while small companies and individuals are locked out of using it. If it was a £200 piece of software then I could use it and probably save enough time to make the money back again in a year, so that is what it is worth to me. Unfortunately they want £20,000 which is an utterly ludicrous amount of money for software to control a shift register, so I will never be buying it.
For me, the software would be expensive. However I can imagine, it can actually save a lot of money even in smaller companies which are manufacturing a lot of boards or expensive boards (or both). Maybe if there was a version of software which is cheaper, to see if it can pay for itself (you know, to test it somehow first), that could help. PS: It looks like, the price was in USD ( ruclips.net/video/lV3DECTwTCQ/видео.html ). I think, the auto-generated tests and the libraries are were the value is hidden. I didn't know they can do that - create a software which can help with creating the test based on schematic and pcb.
Nicholas, I just read a comment on linked in from Istvan and he pointed out a software called TopJTAG Probe for 100USD: www.topjtag.com/probe/ Maybe could be interesting to have a look at.
I’ve had JTAG boundary scan in my “things to learn” for years!!
Great video as always!
Thank you very much Xavi
I was in a training session with Dave a few years ago. He called the projector remote an "ooferdoofer". I dont think i'll ever forget that. With that said, XJTAG is an awesome tool.
On the many times you've asked "what should I make a new video about?" I should have said: "JTAG!!!" If only I'd thought about it before. GREAT content, Robert. Thank you!!
Thank you very much guillep2k
This video was an eye opening experience, thanks for that!!! I have been procrastinating watching this video because the 2 hours length was off putting, but in the end I can say that it have been awesome to watch the uncut version. So much useful content...
JTAG becomes a truly powerful tool when the chip allows write and read access to all (or at least most) device internal registers and memories over JTAG to internal bus such as AXI bridge. Common thing for debugging complex FPGAs and SoCs, with FPGAs also having internal logic analyzer tools from which sampled data can be read over the same JTAG interface.
Usually we would test more complex boards with higher level software and separate test fixtures. Like running DDR memory tests from bootloader and other peripherals from Linux. This allows testing of high speed interfaces at their nominal frequencies. It is also worth noting DDR controllers have comprehensive training and test modes that don't require fast speeds for register writes and reads to run. Its all offloaded to DDR controller hardware.
JTAG for initial programming. U-Boot / other bootloaders for DDR testing. Linux for everything else.
excellent video..!! super interesting ... I have to start studying more about jtag. thanks to both of you.!
Another brilliant vid. I have used XJTAG recently in the exact manner David has sown here. Unfortunately I had to learn most of it on my own. I wish this vid had been done a few months ago :D
Cheers Rob
Yes, a great guest video!
Thank you very much bobby. PS: Yes, it was super interesting to talk to Dave.
I really liked it. The presentation content was impressive
Very interesting, I think I'm going to start using JTAG more often
I have exactly the same thoughts
Great video. I watched till the end. Thanks!
Thanks Robert. Very useful information.
Thank you Doug
What JTAG adapter can be used with XJtag? And can one adapter (ex. Altera/Intel Usb-Blaster) be used on a board that has a Xilinx FPGA? I've always found it odd that Jtag is a standard for all devices, yet every chip seems to work only with the chip vendor's programmer!
How does XJTAG's XJDeveloper / XJInvestigator, compare with other tools.. Navatek JSCAN, JTAG Provision , $100 TopProbe ?
Would like to hear more about generating the files needed for XJtag. For example, how do you use Altera/Intel's BSDL Customizer Tool for modifying a bsdl info file based on the .pin/ucf file. Similarly, Xilinx has a BSDLAnno tool for mapping between the specific user design and boundary scan test.
At the beginning it mentions that the chip core is not used during a JTAG debug. So does it mean that the code is executed on the JTAG Host ( PC. Laptop, etc...) ? So all the registers and memory addresses would be fictitious aliases on the host , which are mapped to the architecture of the chip being tested ?
Quick question Robert. What is the programming language the scripts are written? I am not sure how he wrote the scripts.
Hi may I ask a quick question? In the video David could control the device like LED is because he has the BSDL file, correct?
I should definitely look for an open source software similar to the one presented, of course it won't be as comprehensive as this one, but hopefully it will be enough for my needs.
Very very informative. Thanks
For most I think JTAG just turned into a programing port. Looked at it when it first came out but not many chips that we used had it build in, so we stayed with standard testing methods.
exactly
One question which I've always had is how to locate shorts when, for example, you have two BGA's connected to each other?
Let's say that JTAG detects a short on a pin under BGA A. Now you know which line has a short, but how do you know if it is under BGA A or BGA B?
This has implications for rework. It can be expensive and risky to remove/replace a BGA. Every time you reheat the board you risk creating other problems, so it would be valuable to know which BGA to replace.
I’d imagine if a short on a bga to bga trace is detected, there would be another short circuit detected on another pin?
Not all CPLDs have them. Some require parallel programming.
The programmers are old and obscure, cost hundreds to over a thousand dollars, and can only be run on old machines.
The MAX3000 devices for an example, TC devices do not have jtag while STC do.
Assolutamente oki!
Excellent.
Thank you very much Siddarth
very nice
While JTAG boundary scan is essentially just a glorified shift register, it is still useful for test and programming digital chips. and it has a total market monopoly on this.
However, the pricing is set to ensure that only big companies can use it to get even richer, while small companies and individuals are locked out of using it.
If it was a £200 piece of software then I could use it and probably save enough time to make the money back again in a year, so that is what it is worth to me.
Unfortunately they want £20,000 which is an utterly ludicrous amount of money for software to control a shift register, so I will never be buying it.
For me, the software would be expensive. However I can imagine, it can actually save a lot of money even in smaller companies which are manufacturing a lot of boards or expensive boards (or both). Maybe if there was a version of software which is cheaper, to see if it can pay for itself (you know, to test it somehow first), that could help. PS: It looks like, the price was in USD ( ruclips.net/video/lV3DECTwTCQ/видео.html ). I think, the auto-generated tests and the libraries are were the value is hidden. I didn't know they can do that - create a software which can help with creating the test based on schematic and pcb.
Nicholas, I just read a comment on linked in from Istvan and he pointed out a software called TopJTAG Probe for 100USD: www.topjtag.com/probe/ Maybe could be interesting to have a look at.
@@RobertFeranec Thank you, that looks very interesting.
nice
video cnic
very nice
very nice