This literally came at a perfect time, as I was just trying to figure out how to do this (first time Mac & Verilog user). Very easy to follow, thanks a lot!
I used macos briefly a year ago. Homebrew is a lifesaver, it's amazing that projects like this exists. Yet as it is mainly based on cloning git repos, it is significantly slower than Linux (or even windows WSL) package managers as they can serve binaries from high speed mirrors.
Maybe I missed it, but how does one actually write this onto an FPGA? I mean, I could github my stuff then pull it down on a Linux machine, but I'm trying to avoid that
This video is of great help to so many people stuck on Mac systems. Can you help me figure out why when I run vvl .vvp, I just get Simulation Complete, but not the waveform dump file?
Add this to your testbench.v initial begin $dumpfile("waveform.vcd"); $dumpvars(0,testbench_module_name); end where testbench_module_name is the name of your testbench module
This literally came at a perfect time, as I was just trying to figure out how to do this (first time Mac & Verilog user). Very easy to follow, thanks a lot!
I'm glad it helped!
same happened to me
Yes, helped me too, including the valuable security thing at the end to make GTKWave to run. Thanks for the time making it!
very clean and concise video. I appreciate the dense and straight forward installation instructions. Thank you.
Thank you for the helpful video. It's surprisingly difficult to compile and simulate Verilog on a Mac and this was exactly what I needed!
For now you save my life, I really love u man. I hope this verilog will work for at least 2 days
Thanks for your time! This got me up and running quickly.
Thanks a lot man. This video saved me a hell of a havoc. Really appreciate your work!!
I used macos briefly a year ago. Homebrew is a lifesaver, it's amazing that projects like this exists. Yet as it is mainly based on cloning git repos, it is significantly slower than Linux (or even windows WSL) package managers as they can serve binaries from high speed mirrors.
You saved me some valuable time, thanks man!
Thanks. It's going to be useful to my students too.
I hope so!
thanks man it really helped me..🙌
Thx for this video, This works on M1 mac as well
it doesnt work on m1
@@safwanakhtar2528 Seems to work on my M1 OK...
Color schemes -can you tell us how to change them? I like. yours better, it sticks out more.
what is Ver Structural Verilog Compiler generated AET
Did GTKwave prompt anyone else to also install Rosetta, enabling GTK to run on Macs M chips?
what vs code color theme is that?
help, for some reason I can't create a wave form file from the .vvp file?
You're a king
gtkwave doesn't seem to work on macos 14, can you suggeest a solution?
no links in the descriptions ... why?
Does this work with M1 Macs?
Thank you so so sooooo much!!!
Maybe I missed it, but how does one actually write this onto an FPGA? I mean, I could github my stuff then pull it down on a Linux machine, but I'm trying to avoid that
This video is of great help to so many people stuck on Mac systems. Can you help me figure out why when I run vvl .vvp, I just get Simulation Complete, but not the waveform dump file?
u need to specify dumpfile for ur testbench
thank you so much
hey Derek, when I typed "gtkwave test.vcd &" , it says "command not found: gtkwave". I cant figure out whats wrong.
Hey did you figure how to do this.
@@micahpinto8368 yeah! It was for my last semester assignment. And i forgot
Probably need to add the directory containing gtkwave to your path.
Life saver
Hi! This is really helpful but my problem is that when I run the vvp file, it doesn't make a vcd file for me. What do I do?
i have the same problem with you, u solved the problem yet ? can u help me ?
Your program must be missing $dumpfile and $dumpvars after initial block, therefore .vcd file is not being generated.
thank you...
Hey derek i wanna work on vhdl can i do that with icarus verilog ??
Hey I wanted to know about it too
I have some questions. How can I contact you?
my vvp "filename.vvp" command is not generating anything
Add this to your testbench.v
initial begin
$dumpfile("waveform.vcd");
$dumpvars(0,testbench_module_name);
end
where testbench_module_name is the name of your testbench module
Your program must be missing $dumpfile and $dumpvars after initial block, therefore .vcd file is not being generated.
its showing command not found
same, did you find a solution for this?
what can you do if you get an error "No such file or directory No top level modules, and no -s option."
I have the same problem! :(
@@erodrigolopez same here.
what can we do?
@@Maj_venture You will have to go to the directory where you have stored your .v files and then perform the steps
@@ryanebenezer8014 @@UCKWAl2DgVB6lXByUNHk1ZFQ I have the same problem, please tell how to include the directory while running
@@deepkrishnan9840 how can I contact you. I want to know about the same