would be nice to have the slides Craig's referring to at the start. They seem to start at 10 minutes. Maybe just put a link to the slides? Whoops, they are in the extended description!
I hope future auto-routers not only route the trakcs, but actually move components itself. Often I don't care where the chips and resistors are exactly, and for capacitors and stuff like that I can specify them to be close to some component or pad, and auto-router is free to move things around as it pleases, while just keeping some other rules in check (like maybe I want some component to be further from other components, because I want a heatsink on it, or maybe I want all components to be as close as possible to minimize the board space, so auto-router should put them close, and then I will rearrange any connectors and stuff to also be close, and then decide on the size of the board. It would be pretty cool.
I'd like to see an auto-layout step that could be used iteratively. When you get the mess from the netlist the first time it would be nice to press a magic button that would run a tidy-bowl function on it and try to toss the parts around in some logical manner. Then you could grab big hunks and drag them to where you wanted them if you didn't like the automatic layout completely (as you almost certainly won't) and do a tidy-bowl again to fiddle the small parts around based on your new constraints. Once you have your parts layout and board edges you can run the auto-route.
TopoR seems really cool and the boards are very elegant and nice looking, but it caused MASSIVE DRC violations for me when used with KiCAD. I don't know what is the problem, but it did crossed traces of different nets in the single layer in several spots, it ignored clearance to cutouts in middle of the board (clearance of outer outline is OK). And lots of trace clearance were just smidge too close. That would be kinda OK, but major shorts between nets are no go for me... I don't know what is the problem... Maybe spectra interfaces of KiCAD and TopoR are not fully compatible, there seemed to be some glitches, i even had to slightly modify the file generated by TopoR (filename escaping was broken for files containing space character).
To me it is always better to show the presenter in a small corner window and show the slides below it.
Slides link broken
would be nice to have the slides Craig's referring to at the start. They seem to start at 10 minutes. Maybe just put a link to the slides? Whoops, they are in the extended description!
Not any more!
I hope future auto-routers not only route the trakcs, but actually move components itself. Often I don't care where the chips and resistors are exactly, and for capacitors and stuff like that I can specify them to be close to some component or pad, and auto-router is free to move things around as it pleases, while just keeping some other rules in check (like maybe I want some component to be further from other components, because I want a heatsink on it, or maybe I want all components to be as close as possible to minimize the board space, so auto-router should put them close, and then I will rearrange any connectors and stuff to also be close, and then decide on the size of the board. It would be pretty cool.
I'd like to see an auto-layout step that could be used iteratively. When you get the mess from the netlist the first time it would be nice to press a magic button that would run a tidy-bowl function on it and try to toss the parts around in some logical manner. Then you could grab big hunks and drag them to where you wanted them if you didn't like the automatic layout completely (as you almost certainly won't) and do a tidy-bowl again to fiddle the small parts around based on your new constraints. Once you have your parts layout and board edges you can run the auto-route.
Where are the slides ?
URL for talk slides is broken.
That was a great talk!
TopoR seems really cool and the boards are very elegant and nice looking, but it caused MASSIVE DRC violations for me when used with KiCAD. I don't know what is the problem, but it did crossed traces of different nets in the single layer in several spots, it ignored clearance to cutouts in middle of the board (clearance of outer outline is OK). And lots of trace clearance were just smidge too close. That would be kinda OK, but major shorts between nets are no go for me... I don't know what is the problem... Maybe spectra interfaces of KiCAD and TopoR are not fully compatible, there seemed to be some glitches, i even had to slightly modify the file generated by TopoR (filename escaping was broken for files containing space character).
Thanks for syncing the audio. Much appreciated.
Cheers,
I hear the word auto routing a lot but not much about them.
wow really not showing the presentation with the talk? How USELESS.
Not to beat a mostly dead horse, but don't focus on the talking head. It's what the talking head is referring to that is important! 🤦♂️