MOS Transistor Basics-I

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  • Опубликовано: 16 дек 2024

Комментарии • 82

  • @shubhamshukla4448
    @shubhamshukla4448 4 года назад +37

    Clearly explanated everything... I am glad i come to this channel finally... But my graduation is completed .

  • @rishipl3559
    @rishipl3559 5 лет назад +29

    Thank you, professor, for your speed of delivering points is good. You are clearing all doubts before arising in my mind. I want faculty like you for teaching VLSI. Again Thank You PROFESSOR

  • @swetakashyap
    @swetakashyap 4 года назад +21

    Sir it was fantastic lecture I have ever listen till. Too nice derailing has been done by your side. Actually I studied this subject 11 years before and then almost no connection..but your lecture reminds or revive everything to me very very clearly. Thanks

  • @sudhanshu1210
    @sudhanshu1210 6 лет назад +32

    This was a fabulous lecture. I must appreciate the faculty for his knowledge and very good delivery. Also, thank for clarifying many basic concepts.

    • @hvkeee
      @hvkeee 5 лет назад +1

      Sir ur interest towards subject made me to see this lecture video full....

    • @VikramchauhanChauhan-pn5ol
      @VikramchauhanChauhan-pn5ol 5 лет назад +4

      @@hvkeee Prof saheb is telling that Vt is controlled by Vbi ( junction built in potential) tells a lot about state of affair in IIT... may be reservation is cause

    • @rudrajeet814
      @rudrajeet814 11 месяцев назад

      No wrong their​@@VikramchauhanChauhan-pn5ol

  • @ananya2289
    @ananya2289 4 года назад +8

    Excellent explainations best teacher ever , thanks a lot sir this was very much required.

  • @justcoderks
    @justcoderks 2 года назад +21

    It is nice to study from Rakesh Jhunjhunwala sir... thank you sir for teaching VLSI apart from investing.

  • @jashwanthreddy162
    @jashwanthreddy162 2 года назад +5

    50:20
    One side is specified as source and other as drain just because of the voltage difference .as we all know that the source is grounded the side which has lower potential is known as source and the side with higher potential is known as drain.

  • @gubbichow
    @gubbichow 11 месяцев назад +1

    Answer to the question asked at 24:28 --The one which is connected to higher potential (Vdd) is drain and the one which is connected to lower potential (vss) is source . It is called symmetric because rise time and fall time are equal, device ratio is unity.

  • @shreyalgupta
    @shreyalgupta 9 месяцев назад

    This lecture is so brilliant! None of my college professors, or even other resources compare to this.

  • @RajaRam-cv4qd
    @RajaRam-cv4qd 4 года назад +2

    Excellent sir... crystal clear explanation... Thanks for your efforts... Thank you

  • @saumyamukeshp2288
    @saumyamukeshp2288 5 лет назад +6

    Good explanation.. very clear. I have got one certificate. And i wish i could get another one. Thanks NPTEL...

  • @dhruvandangar9972
    @dhruvandangar9972 3 года назад +2

    nice explanation sir, i appreciate your efforts, may god give you all that you want in your life.

  • @praveenraj2279
    @praveenraj2279 5 лет назад +80

    The title of every lecture should be properly specified so that their searchability increase while searching on RUclips and Google.

    • @rishipl3559
      @rishipl3559 5 лет назад +7

      Yeah, absolutely correct good lecture lost its SEO content in google. Rather than searchability please specify SEO (Search Engine Optimisation)

    • @aerodynamico6427
      @aerodynamico6427 2 месяца назад

      Some lazy idiot at IITM, confident of a "permanent job", is making these third-rate titles.

  • @bhavdeepgadhvi3055
    @bhavdeepgadhvi3055 3 года назад +9

    #rakesh jhunjhunwala is a brilliant teacher 😅🙏👌

  • @ShamsUlHaqdec
    @ShamsUlHaqdec 2 года назад +3

    At 40:48, i think in depletion type n-MOSFET there is a physically implanted channel(as i have read from the books) . It does not have an N-type substrate as you quoted sir. But when there is a channel already present then how does the electric field modulate the channel which is the basic working of a MOSFET.

  • @arpitachakraborty5162
    @arpitachakraborty5162 23 дня назад

    Excellent sir.. Thank you sir.

  • @diksha1331
    @diksha1331 3 года назад +1

    Best explanation ever.

  • @ashubabbar3322
    @ashubabbar3322 4 года назад +4

    What is the most suitable answer for the question asked at 24:32?
    if mos structure is symmetrical then why one region is called source and another drain?

    • @gaganaggarwal7599
      @gaganaggarwal7599 4 года назад +12

      Because although they seem diagrammatically similar, at high frequency of operation, they do not exhibit the same capacitances (because they are made that way, they source being closer to the bulk). So yeah, sure for DC operation their switching action is symmetrical but not in computer circuits operating at GHz frequencies.

  • @mmzf2357
    @mmzf2357 Год назад +1

    Best lacture 👍🏻

  • @ElectronicsbyBSR
    @ElectronicsbyBSR 2 года назад +1

    Very nice presentation sir , i really got some additional exposure than what i know already. Thank you so much sir , Have a great day sir. Srinivas , Hyderabad.

  • @saketmishra4116
    @saketmishra4116 3 года назад +2

    Excellent explanation Sir!. Really enjoyed the lecture

  • @mohammadkhaliquekhan2041
    @mohammadkhaliquekhan2041 3 года назад +1

    Explained very well 😃

  • @vechamvidya4499
    @vechamvidya4499 3 года назад

    Clearly explained from nook and corner

  • @incharawalvekar3977
    @incharawalvekar3977 5 лет назад +2

    wonderfull explanation !!

  • @satyam_dey
    @satyam_dey 5 лет назад +2

    Didn't realise but the green screen IS helping. The other IIT videos' dull background makes it tough to concentrate.

  • @vechamvidya4499
    @vechamvidya4499 3 года назад

    Very good explanation...

  • @bharathvakka9489
    @bharathvakka9489 5 лет назад +1

    Great lecture sir

  • @venugopalreddygogireddy1918
    @venugopalreddygogireddy1918 4 года назад +1

    Sir please tell why do we have pre channel in depletion mosfet why not in enhancement mosfet?

  • @worldinstrumentationengineer
    @worldinstrumentationengineer Год назад

    SUPROBHAT GURU JI 🙏🙏

  • @kartikagrawal6999
    @kartikagrawal6999 6 лет назад

    Excellent Explanation

  • @aryamick
    @aryamick 4 года назад +2

    Is the explanation of depletion mode mosfet correct?

  • @santlalprajapati
    @santlalprajapati 4 года назад +1

    This is very good lecture to understand. Sir how can I get depletion mode Ltspice model to verify IV characteristic

  • @MuhammadBilal-vw8tj
    @MuhammadBilal-vw8tj 4 года назад +2

    why we use bulk/substrate contact?

  • @akhilakki8555
    @akhilakki8555 5 лет назад +3

    thanks u sir a lot , love u sooomuch ,tnx tnx

  • @sleepbuddyapp
    @sleepbuddyapp 5 лет назад

    very nice lecture

  • @alekhyadevi8169
    @alekhyadevi8169 4 года назад

    sir please give the answer you asked for...they are saying we can interchange but unable to say why its on left and drain on right to gate of mosfet

  • @rahuljaiswal9049
    @rahuljaiswal9049 4 года назад

    sir please tell me how to get it on swayam or nptel because this course is not showing there

  • @kishorevalavala9887
    @kishorevalavala9887 5 лет назад +1

    In n-type depletion mode mosfet the substrate is not n-type, if i am not wrong

  • @nikunjkumar7065
    @nikunjkumar7065 Год назад

    Can anyone let me know that As the technology is upgrading day by day is it a good idea to go with these videos?

  • @booksamikshak
    @booksamikshak 5 лет назад +1

    Sir, the "n-well" that you explained - it is ultimately the combination of NMOS and PMOS or anythng else?

    • @techinsight7850
      @techinsight7850 5 лет назад +3

      N well is basically doping of n type electrons in a p type substrate

    • @techinsight7850
      @techinsight7850 4 года назад

      @my work Albert malvino

  • @yashbaddi29
    @yashbaddi29 5 лет назад +1

    sir where can i get that ppt...

  • @guddijain6818
    @guddijain6818 4 года назад

    Do anyone know best lecture of nptel for vlsi testing and testability

  • @jainandanmodi1124
    @jainandanmodi1124 3 года назад

    sir pls explain clearly how cox and cdep are in series ?

  • @prasundatta6590
    @prasundatta6590 3 года назад

    What is the reference book followed in this course??

    • @ashishranjan3501
      @ashishranjan3501 2 года назад

      Design of Analog CMOS Integrated Circuits
      Book by Behzad Razavi

  • @rmahalaxmi4069
    @rmahalaxmi4069 2 года назад

    sir still are you working in IIT Roorkee, sir could you please tell me

  • @guddijain6818
    @guddijain6818 4 года назад

    Can anyone plz tell me good lecture for digital communication and analog communication

  • @satyajitanand45
    @satyajitanand45 5 лет назад +4

    Dear Sir,
    In NMOS Transistor, Current doesn't flow from source to Drain terminal rather electron flows.

    • @abhishekkumar-ii5gy
      @abhishekkumar-ii5gy 5 лет назад +2

      Isn't it same??

    • @janimohammad9675
      @janimohammad9675 5 лет назад +1

      Electrons carry current

    • @shubhankarsrivastava9578
      @shubhankarsrivastava9578 3 года назад +2

      @@janimohammad9675 current flow in direction opposite to flow of electrons

    • @abhijitkumarmanna2031
      @abhijitkumarmanna2031 3 года назад +1

      right sir i was also confused

    • @09baher
      @09baher 2 года назад

      good discussion, most of the circuit analysis, we use the convention current was is based on "holes" so opposite of "electron". So, when we say S-to-D that is the "electron" current, in circuit analysis (textbooks), most of the time we are assuming the convention or "hole" current which so D-to-S current. It can be confusing.

  • @066_le_masrat_jan_ece7
    @066_le_masrat_jan_ece7 2 года назад

    Thanku so much sir

  • @utsavgoyal8963
    @utsavgoyal8963 2 месяца назад

    29:32 resume

  • @Royalpuppie
    @Royalpuppie 2 месяца назад

    Tq sir

  • @mdrashidalamdce
    @mdrashidalamdce 3 месяца назад

    15/09/24 Lecture 1 Done

  • @kanchansharma6248
    @kanchansharma6248 4 года назад

    Sir can i get notes of this?

  • @mccreate
    @mccreate 4 месяца назад

    30/7/2024 part-1
    completed

  • @S.P20sss
    @S.P20sss 3 года назад

    Amazing

  • @vinaykumarreddykotha9186
    @vinaykumarreddykotha9186 5 лет назад

    Sir I am Vinay, from telangana .Sir I have registered for cmos vlsi designing as my nptel course .Sir I had a doubt that some will complete their course fastly and some by some delay then,exam date will be fixed or based on completion we can write the exam ?

    • @ramcharan-gs4vz
      @ramcharan-gs4vz 5 лет назад

      @@arunapotla7883 haa vachindhi

    • @ramcharan-gs4vz
      @ramcharan-gs4vz 5 лет назад

      @@arunapotla7883 frustration lo joke chesa le ,job aa bokka aa 2 backlog lu vunnai

  • @aerodynamico6427
    @aerodynamico6427 Год назад

    @40:00 onward....speaking faster and even faster...faster, faster, faster...this is a race, isn't it? Who cares if the students can't follow?

  • @JenniferGarcia-c4w
    @JenniferGarcia-c4w 3 месяца назад

    Geovanni Summit

  • @aerodynamico6427
    @aerodynamico6427 Год назад

    Why don't you write even smaller? Then at least ants can understand semiconductors!

  • @arunrajput8883
    @arunrajput8883 4 года назад +2

    In 51 minute video right .....you try to teach well right ....but i can't get you right ....please make this lecture in hindi right ....but only if your hindi is right ....sorry sir ...right...

    • @mm__1659
      @mm__1659 3 года назад +7

      Learn English ...it will be beneficial for you ......

    • @shagundobhal2490
      @shagundobhal2490 3 года назад +7

      Writing a comment in English and asking for lecture in Hindi just to show yourself cool is not 'right'!