Very good one. Would you mind explain few examples of DC-DC converters where these problems can occur? I haven't done any converters so far so curious. But many thanks for this wonderful video..
These problems occur in any dc dc converter which uses on chip switches. CMOS switches have associated BJT, which turn on, for example during dead time or when converter is in reverse CCM mode. Essentially whenever current flows through body diode of these switches.
@@analogsnippets right even though transistor is in off state it’s going to eat some current if we forward bias diodes for some reason I have this question when let’s say these parasitic diodes are reverse biased there will be some reverse leakage current flowing through diode .. do models consider that leakage ? Or Monte Carlo analysis ? Because this leakage is so hard to predict do they model that ?
It depends on which diodes. Source-bulk and drain-bulk diodes are modeled in pmos/nmos model and any leakage should show. For well diodes you need to instantiate them with right area/perimeter in your schematic to see leakages. BJTs are more tricky. You will require dedicated silicon measurements of appropriate device and then dedicated models will be required to simulate them. For accuracy of leakage values you need to check with foundry. These leakages are significant only at high temperatures.
@@analogsnippets i agree . But I always wonder how would one define the leakages in models ? Because leakages are the effect of some random phenomenons like for mosfet when fet is off and high vds is applied, there is leakage due to random silicon crystal defects ...
Leakages are not that random. For example in MOS, leakage can be caused by subthreshold operation or due to effects like GIDL, and in diodes there is reverse saturation current which flows because of thermally generated electron hole pairs. There is well documented physics for leakages, and model can be very accurate.
Very good one. Would you mind explain few examples of DC-DC converters where these problems can occur? I haven't done any converters so far so curious. But many thanks for this wonderful video..
These problems occur in any dc dc converter which uses on chip switches. CMOS switches have associated BJT, which turn on, for example during dead time or when converter is in reverse CCM mode. Essentially whenever current flows through body diode of these switches.
Perhaps, you discussed it in other videos, but latchup and its prevention seems relevant here.
Yes, wanted to discuss latch up here but ran out of time. May be in a future video.
If gate to source is shorted for pmos Kenya that fet is off since vgs is zero @9:46
Yes, PMOS is off. Conduction happens via parasitic diode/bjt.
@@analogsnippets right even though transistor is in off state it’s going to eat some current if we forward bias diodes for some reason
I have this question when let’s say these parasitic diodes are reverse biased there will be some reverse leakage current flowing through diode .. do models consider that leakage ? Or Monte Carlo analysis ? Because this leakage is so hard to predict do they model that ?
It depends on which diodes. Source-bulk and drain-bulk diodes are modeled in pmos/nmos model and any leakage should show. For well diodes you need to instantiate them with right area/perimeter in your schematic to see leakages. BJTs are more tricky. You will require dedicated silicon measurements of appropriate device and then dedicated models will be required to simulate them. For accuracy of leakage values you need to check with foundry. These leakages are significant only at high temperatures.
@@analogsnippets i agree . But I always wonder how would one define the leakages in models ? Because leakages are the effect of some random phenomenons like for mosfet when fet is off and high vds is applied, there is leakage due to random silicon crystal defects ...
Leakages are not that random. For example in MOS, leakage can be caused by subthreshold operation or due to effects like GIDL, and in diodes there is reverse saturation current which flows because of thermally generated electron hole pairs. There is well documented physics for leakages, and model can be very accurate.