I like this format video. I am a Control Systems Engineer not a professional hardware/layout engineer and these type of videos that show real examples are great for my novice layout attempts. A video on component placement for assembly would be good. For example I do not know how close I can put capacitors to other components and what placement errors will cause poor assembly yields.
Robert I have learned altium from your courses. It has been more than 1 year from that time. I really appreciate the effort you put here to improve the newbie engineers like myself. Thanks a lot man, you are the best !
I am so satisfied with these series of videos because when I am aware of the common mistakes I will for sure prevent the mistakes. I really appreciate your time to make these series.
I was amazed, that i've answered all yours questions in this video. Not being professional board layout guy i was recently able to prototype my design with FPGA, FMC, DDR3 and PCIe with all of those features working. DDR3 is not the bleading edge by now and PCIe gen 1 is old as hell, but it still took me good pure 3 months of layout time. Thanks for your tutorials and tips for DXP!
Another great instructional video, well done. I like the format and would like to see more, particularly fanout, pin-swapping and the best way to do length and propagation delay tuning. Keep up the great work, thanks again.
HELLO, i really enjoy your video. Can you make please a video explaining this things: ground loop, current return path and sensible signals? Please, i really need to understand all of this. Thanks !!
Nice to know about the requirements needed for soldering after completion of the board. This gives insight into the manufacturing process which is an essential note for the designers.
Thanks Robert! It is very helpful to make tips based on real life examples. You can visualize the info in your mind easier and make it stick. As they say, a picture is like a thousand words...
Another awesome video Robert :). Can't wait for the next one! I personally use the keepout tracks to make sure I'm not routing too close to the edge, as they will raise DRC errors if I forget to check. There are some rules that can be set weather you want to check for PADS or VIAS or TRACKS. Either way works and it is just up to preference.
As always great video. Thank you very much Robert. Please do continue the series. Best way to learn hardware design is to learn from the mistakes of others.
Thanks for your sharing with us. I'm actually a freshman at the area of high-speed layout and I haven't dealt with a system as complex as yours. This project you shared with us is really amazing and broadens my horizon a lot. Besides, those tips are really useful and I hope I will be able to handle a project like this sooner in the future.
Hi Robert, really liking this format. It's great to see a practical example from someone who's also learning to do layout. I'd probably make similar mistakes and overlook the same things, even after working through your courses. This kind of teaching is similar to tutoring rather than a classroom course. Thanks so much for your time and effort that goes into making these. Much appreciated! I second the comment the question about component layout for assembly, that's a great topic. I also wonder, apart from all these important high speed signals, how does one improve routing the power distribution?
Robert, why not use a HDI board with buried/blind vias and route the high speed traces on the layer with no vias. It will be much easier to implement impedance control and length matching. The distance between the traces to avoid crosstalk is dictated by the DDR manufacturer and should be followed (2lambda, 4lambda etc). HDI will also facilitate the use of ground shielding to avoid crosstalk and reduce EMI.
I like this format, can't say make it shorter because everything you mention is useful, but wanna be able to skip some of the points which might be obvious for me, so maybe, add timeline to the video.
Great information Robert, Please continue this series of videos, once again would like to mention that its tough to find the layout review/improvisation techniques in the web easily through video in particular.
As always, a lot of magnificent information and tips about the PCB layout for FREE !! I liked this kind of format and the 27 min video was like 5 min for me. thanks a lot!
I love this type of content. I usually watch something like this in the morning or during lunch. It's not the type of upload I watch any time for educational entertainment (not like space/rockets/astronomy/science/etc.). I mention this because, while I have notifications set for this channel, my intention is to take note of the upload, and watch it later when I am most ready to absorb new information. This is only what I do, one subscriber, personally, but I hope it might help you better understand why your uploads take awhile to develop views in the hours immediately after making the upload public. I know (remember) what it feels like to see few views on an upload hours after posting. The only uploads of yours I might skip are the altium specific ones about the technical software details, but no one makes all content perfect for every viewer. This type of upload is ideal for me. It's well beyond anything I have ever tried, and is quite humbling in it's complexity, but still contains useful information I can understand and apply. Quick question, do you know of any sources that cover practical etching and fabrication of boards with *more than 2 layers?* I must figure out through hole plating and what type of epoxy to use to glue up the stack, but I have a supply of extremely thin copper clad and blank cores. I hope to be able to do my own multilayer boards at some point. It's a pointless thing to do, but I want to do it, at least once, just for fun. I'm curious if there are any documented sources about doing this type of prototyping that you are aware of. Thanks for the reference quality upload. -Jake
Jake, thank you. Very helpful. That may explain why often people watch the videos later. PS: I do not know any sources about practical etching and fabrication of multilayer boards. BTW, I believe plating is done in multiple steps and there are actually at least two processes when you do plating - one is a very thin plating (it grows very slowly) but it will stick to surface, then other plating is growing the copper (much faster than the first plating) on already pleated surface of the first plating process.
Thank you alot for these great videos... I have watched many of them and they are very useful. I am a beginner and I suggest you make videos for ppl who design raspberry-pi or arduino based circuits with i2c and spi and what main points should they be aware off.... Many many thanks again your videos are indeed of great value.
Getting the connector pin outs to facilitate easier routing is always a game, despite my best efforts it’s more often than not there’s a pin swap needed.
If the base board has more space and is simpler, you could make the tracks different lengths on purpose on the complex board, and then compensate the difference on the board with more space. But that obviously is something that you need to have a lot of control over, and need to really think if it is what you want. I.e. boards then might be really hard to use with new design in the future.
Hi Robert, thanks for your endeavor to teach us more tips. I have one question about layers when we have to route more than two layers, how should the layers be chosen and which one by sequence? I will appreciate if you make me understand.🤗
Hey, Robert. How about a couple of words on LENGTH vs DELAY matching? Yes, it is possible to change layers of all the intarface signals at once or route them all on a single layer. Altium, however, allows to create rules to match the propagation delays instead of lengths. Is it a reliable approach? It seems to me that it should work for signals with t_crit below ~2.5 GHz and everything faster than that is likely to be some kind of serial interface that can not be properly routed on multiple layers anyway. Thanks.
Hi sir, can you explain about fpga Fanout and layer by layer escape route, It is very useful for while doing layout of complex BGA package. Thanks for nice video
Much awaited video 👍🏽 Thank you sir, you every video is informational, haven't watched it full but I am sure it will of great help to designers. Sir do you provide one to one online classes? If yes then I am interested in taking classes from you. Love from India
@@RobertFeranec OK sir, if ever it would be possible, please post something, related to that, so that i would get to know and I will contact you for the same. I will be curiously waiting for it.
Hello Robert - excellent video, thank you! Question: For board edge clearance (tracks, components) you are using green lines on Mech Layer 14... also, one of your review points covered the NPTH being too close to tracks - why not fix these problems before starting the layout by setting up proper DRUs? I think it is very dangerous, to start a design with incomplete rules, don't you agree? Thanks!
Can you comment on the lane length matching vs impedance/crossover/crosstalk and frequency? Seems like signals are matched to within a few mm while signals on them could tolerate 10-20mm differences with no effects... I notice a lot of time and energy is spent in other designs to do this type of matching when it is not needed. Crosstalk or other returnpath related issues play a big role.
Very good comment. For modules, we usually do tight length matching as we never know where the module is going to be used and how other engineers are going to do layout on baseboards. However if you have full control over the whole connection, yes, many interfaces can be simply length match in centimeters / inches or they do not even need to be lengthmatched.
Got 2 little questions: When you got the space - Is there any reason to not make the tracks as wide as you can? Ok, not 5 mm for a tiny signal wire but like why not 0.5 mm when you got the space, or 5 mm for a power-trace that only is supposed to carry like 1A. And with free open areas the same - are the downsides to filling them with power/ground-planes? it just lately i have often seen boards that not only are really spacious (like 5 components, 2 connectors and 1 small chip on an arduino-shield) but also 0.127 mm tracks with wide areas (like 1 cm) between each other.
@@RobertFeranec one more thing can you tell me about Tenting on via,. What is beneficial for this. I used it just for soldermask clearance with other components but I doubt it can effect on signal integrity.! Please confirm
@@MuhammadAhsan-rr4js Once I left vias untented and I had to be extra careful to manipulate with be board as I was really worried to make short circuits. So I always tent vias.
Thank you Sahar. PS: We are using diagonal lines in some cases (e.g. fanout), however I have not considered to use them for long signals yet. Probably simplest reason would be that it could look messy, however real reason is, I have not really needed that. When we route we often have to route horizontally or vertically to make it easy to connect everything - I have a system how to organize, swap, connect together tracks in high density designs. If I would be just using straight lines, that could make it much harder.
Great video again; when it comes to length matching isn't it better to match propagation delays of the lines? As far as I know, delay matching takes effects of dielectrics into consideration; calculates travel speed and then matches the delays of the lines.
when you keep all of the tracks that need to be delay matched with respect to each other on the same layer referenced to the same planes length is same length is virtually identical to same delay, when you can not do that things get really tricky, also when you are including delay or length in package numbers given by the device manufacturer and for determining how much length variation is acceptable you need to have fairly good idea of the propagation speed in your traces
@@timun4493 I agree. Also, I have really bad experience with length matching based on propagation delay - that board never worked properly. And changing stackup or PCB manufacturer was nightmare - a little bit different stackup and propagation has changed. Plus ... I do not trust the software to calculate the propagation correctly - altium can't even calculate simple signal length properly (noticed differences in length between different altium versions?) so trusting the results of calculation of propagation delay - for me big no no.
Hello I am beginners in altium but i am use altium 20 so but you explain in altium 19 which has different order in your first video do to beginners ,i am so happy for your effort, but can give me advice how to start with altium 20
AD19 and AD20 are very similar. You should be able to figure out the changes by yourself. However if you still have any questions, you can ask on your forum here: designhelp.fedevel.com/
Hello bro, i am new to altum, using altium 09, facing one problem, that when draging components they disappear and appears when placed, same thing happened with track, after place line command after first left click or very first click track doesn't appear and paper when next click of place, please help me to find the settings are there to visible tracks when routing manually.
Hi Robert, I see you talk about your student designing DDR4. I've seen at your course for Advance Layout you cover up to DDR3. Do you have other courses covering that I'm missing ?
Yes, please. Do more of this kind of videos. Very helpful for beginners like me. Also, can you help me with an error in my Altium 18 I am currently struggling with right now? I always get this error window every time I open .pcbdoc file. Hope you can help. I've been struggling with it for 3 days now. I've uninstalled my version of Altium 18 and tried to install other versions like 18.1.6 and .7 but I still get the error every time. Error: List index out of bounds (5) at 0000000156872400. , Base Address: 00000001564D0000.
Thank you Az. PS: I do not really know what the error is about, but often the problem can be in the file. Maybe try to "Save as ..." the file and try deleting the stuff from this temporary file until you find out what is causing the error.
Do get even better crosstalk performance, wouldn't it be even better to add a ground track or plane between these DDR3 tracks as some sort of a shield?
@@RobertFeranec i usually add a clearance rule for pour to impedance controlled net class of something like 5-10x height over plane to not cause to much impedance variation, similar reasoning as for deciding how much seperation to put between tracks to avoid crosstalk, you usually don't want structures on the same layer to significantly couple to each other and by keeping coupling to the return conductor that much stronger you can basically avoid pretty much all issues. for differential signals coupling is often introduced deliberately but only to archive required impedances while saving, if you have the space loose coupling is almost always better
Yes, you can use rules. PS: I didn't want to use rules, I only used the lines as some guidelines to tell me approximately where I can go with components and vias/tracks. You can see in some placed I went over the lines.
Juan, I am not sure what you mean .... do you mean microcontroller or processor and what architecture? For microcontrollers I use the software and tools what chip manufacturer provides, for processors ... it depends what CPU you have ... but again, I usually just use what chip manufacturer provides (however compilation, implementation, debugging is very different between architectures and sometimes even not really possible e.g. customizing BIOS is tricky)
@@RobertFeranec yes, you're right, software tools to syntetizer, debugging, spice, check code, simulation, assembly virtually a microprocesor's behavior before to start photolithography processor, like at ASML, thank for your reply
Thank you. I am from Slovakia PS: I know about my pronunciation ... hmm .. tried to improved it couple of times, signed up for some classes in person, didn't help much
@@RobertFeranec Oh My God! We love Slovakia so much! You are lucky to live in such a great country. We visited Slovokia about year ago, Tatras is awesome! Good luck, thank you for useful videos!
To control distance to the edge use rule: Manufacturing->Board outline clearance. Very useful rule. Thank YOU Robert!
If the guy doing this design is a junior, I don't really know what I am.
Another perfect video.
Thank you Kristian
I like this format video. I am a Control Systems Engineer not a professional hardware/layout engineer and these type of videos that show real examples are great for my novice layout attempts. A video on component placement for assembly would be good. For example I do not know how close I can put capacitors to other components and what placement errors will cause poor assembly yields.
Thank you Chris
I am in a very similar position and would love a video on placement considerations! Great idea.
@@RicardoGorinstein Putting down on my list of possible youtube videos
Very educational. I'm still a PCB newbie, so I appreciate learning this before I dive in. Thank you Robert.
Very good format. People learn much more from their mistakes rather than theory. That's how the experience comes. Would be waiting for future videos
Thank you very much Sergejs
When your video is around 1h is difficult to find the time to watch it. 30 min it's the best for me. Thanks for all your videos
Robert I have learned altium from your courses. It has been more than 1 year from that time. I really appreciate the effort you put here to improve the newbie engineers like myself. Thanks a lot man, you are the best !
I am so satisfied with these series of videos because when I am aware of the common mistakes I will for sure prevent the mistakes. I really appreciate your time to make these series.
I was amazed, that i've answered all yours questions in this video. Not being professional board layout guy i was recently able to prototype my design with FPGA, FMC, DDR3 and PCIe with all of those features working. DDR3 is not the bleading edge by now and PCIe gen 1 is old as hell, but it still took me good pure 3 months of layout time. Thanks for your tutorials and tips for DXP!
Well done!
I definitely like this type of video. It is helpful to see your examples of what you would change in the layouts and why
Thank you very much Doug
Another great instructional video, well done. I like the format and would like to see more, particularly fanout, pin-swapping and the best way to do length and propagation delay tuning. Keep up the great work, thanks again.
Thank you very much David.
HELLO, i really enjoy your video. Can you make please a video explaining this things: ground loop, current return path and sensible signals? Please, i really need to understand all of this. Thanks !!
S bro plz make above mentioned video bro
Please don't stop making these videos! Very good info here!
Thank you very much Zach
This is gold Robert! Thank you and YES, I would like to see more on this board.
Thank you very much Edgar
@@RobertFeranec :)
Nice to know about the requirements needed for soldering after completion of the board. This gives insight into the manufacturing process which is an essential note for the designers.
Thanks Robert!
It is very helpful to make tips based on real life examples. You can visualize the info in your mind easier and make it stick. As they say, a picture is like a thousand words...
Thank you giannis
Really nice video, thanks for the share of knowledge. Junior enginners appreciate it.
Another awesome video Robert :). Can't wait for the next one! I personally use the keepout tracks to make sure I'm not routing too close to the edge, as they will raise DRC errors if I forget to check. There are some rules that can be set weather you want to check for PADS or VIAS or TRACKS. Either way works and it is just up to preference.
Very good video. Some points I knew already, but nice to get it confirmed and some were new.
wow you videos are really helping me to adjust in this profession, I am just a newbie and am able to learn a lot😄
As always great video. Thank you very much Robert.
Please do continue the series. Best way to learn hardware design is to learn from the mistakes of others.
Thank you very much Kerem.
Thanks Robert for the great lesson.
Is anyone still watching in 2022 and feels like learning a lot from Robert?! :))
Thanks for your sharing with us. I'm actually a freshman at the area of high-speed layout and I haven't dealt with a system as complex as yours. This project you shared with us is really amazing and broadens my horizon a lot. Besides, those tips are really useful and I hope I will be able to handle a project like this sooner in the future.
Hi Robert, really liking this format. It's great to see a practical example from someone who's also learning to do layout. I'd probably make similar mistakes and overlook the same things, even after working through your courses. This kind of teaching is similar to tutoring rather than a classroom course. Thanks so much for your time and effort that goes into making these. Much appreciated!
I second the comment the question about component layout for assembly, that's a great topic. I also wonder, apart from all these important high speed signals, how does one improve routing the power distribution?
Thank you Christe4N. PS: I have some notes also about power distribution and I may be making a video about it in future
Very good job, Robert. I like this kind of videos, pls go on. Thank you ver very much and greetings from Turkey.
Thank you very much Tarik
Hello Robert! the video is really useful and educational as the rest of your channel, Thanks.
Thank you very much Anas
I love other people's mistakes!! Excellent video.
:D
Robert, why not use a HDI board with buried/blind vias and route the high speed traces on the layer with no vias. It will be much easier to implement impedance control and length matching. The distance between the traces to avoid crosstalk is dictated by the DDR manufacturer and should be followed (2lambda, 4lambda etc). HDI will also facilitate the use of ground shielding to avoid crosstalk and reduce EMI.
I like this format, can't say make it shorter because everything you mention is useful, but wanna be able to skip some of the points which might be obvious for me, so maybe, add timeline to the video.
Thank you. PS: Good idea. I am making a note and when I have some time I could set the chapters.
Great information Robert, Please continue this series of videos, once again would like to mention that its tough to find the layout review/improvisation techniques in the web easily through video in particular.
Thank you Chethan
Great level of information. Very educational with great examples, explanation and straight to the point. Keep up the great work
Thank you very much Gaston
As always, a lot of magnificent information and tips about the PCB layout for FREE !! I liked this kind of format and the 27 min video was like 5 min for me. thanks a lot!
Thank you Mehdi :)
I love this type of content. I usually watch something like this in the morning or during lunch. It's not the type of upload I watch any time for educational entertainment (not like space/rockets/astronomy/science/etc.). I mention this because, while I have notifications set for this channel, my intention is to take note of the upload, and watch it later when I am most ready to absorb new information. This is only what I do, one subscriber, personally, but I hope it might help you better understand why your uploads take awhile to develop views in the hours immediately after making the upload public. I know (remember) what it feels like to see few views on an upload hours after posting.
The only uploads of yours I might skip are the altium specific ones about the technical software details, but no one makes all content perfect for every viewer.
This type of upload is ideal for me. It's well beyond anything I have ever tried, and is quite humbling in it's complexity, but still contains useful information I can understand and apply.
Quick question, do you know of any sources that cover practical etching and fabrication of boards with *more than 2 layers?*
I must figure out through hole plating and what type of epoxy to use to glue up the stack, but I have a supply of extremely thin copper clad and blank cores. I hope to be able to do my own multilayer boards at some point. It's a pointless thing to do, but I want to do it, at least once, just for fun. I'm curious if there are any documented sources about doing this type of prototyping that you are aware of.
Thanks for the reference quality upload.
-Jake
Jake, thank you. Very helpful. That may explain why often people watch the videos later. PS: I do not know any sources about practical etching and fabrication of multilayer boards. BTW, I believe plating is done in multiple steps and there are actually at least two processes when you do plating - one is a very thin plating (it grows very slowly) but it will stick to surface, then other plating is growing the copper (much faster than the first plating) on already pleated surface of the first plating process.
Thank you alot for these great videos... I have watched many of them and they are very useful.
I am a beginner and I suggest you make videos for ppl who design raspberry-pi or arduino based circuits with i2c and spi and what main points should they be aware off.... Many many thanks again your videos are indeed of great value.
you are perfect Robert
Getting the connector pin outs to facilitate easier routing is always a game, despite my best efforts it’s more often than not there’s a pin swap needed.
I agree
Another gem. Keep up the great work Robert.
Thank you Yaghiyah
Thank you Robert! These videos are great.
Very helpful video. Thank you Sir
If the base board has more space and is simpler, you could make the tracks different lengths on purpose on the complex board, and then compensate the difference on the board with more space. But that obviously is something that you need to have a lot of control over, and need to really think if it is what you want. I.e. boards then might be really hard to use with new design in the future.
Yes. Also, especially if the baseboard is designed by other people or companies, you may not have any control over the baseboard layout.
Hi Robert, thanks for your endeavor to teach us more tips. I have one question about layers when we have to route more than two layers, how should the layers be chosen and which one by sequence?
I will appreciate if you make me understand.🤗
Thank you Mohammad. I may be making a video about that.
Very educational! Thank you very much!
Thanks for anothrr great video! Keep em coming. I am very interested in this subject.
Thank you very much
Hey, Robert. How about a couple of words on LENGTH vs DELAY matching? Yes, it is possible to change layers of all the intarface signals at once or route them all on a single layer. Altium, however, allows to create rules to match the propagation delays instead of lengths. Is it a reliable approach? It seems to me that it should work for signals with t_crit below ~2.5 GHz and everything faster than that is likely to be some kind of serial interface that can not be properly routed on multiple layers anyway. Thanks.
thank you of make video ,I like to style of pcb layout
Thank you
Thank you so much Robert, I like you very much :)
Thank you master.
Excellent video for me like beginner. Thanks!
Thank you very much Sung-Hyun
Excellent video...
great info. thanks
Hi sir, can you explain about fpga Fanout and layer by layer escape route, It is very useful for while doing layout of complex BGA package.
Thanks for nice video
Thank you Sujit. Fanout is on my list in this series
Great content!
Thank you very much Jerome
Much awaited video 👍🏽 Thank you sir, you every video is informational, haven't watched it full but I am sure it will of great help to designers.
Sir do you provide one to one online classes?
If yes then I am interested in taking classes from you.
Love from India
Thank you Tanmay. PS: Currently I am not doing personal classes as it is very difficult with my time.
@@RobertFeranec OK sir, if ever it would be possible, please post something, related to that, so that i would get to know and I will contact you for the same. I will be curiously waiting for it.
Sir after improvement , you can show my PCBs in one slide ... So that people can compare both at same time.
What should be minimum distance between tracts to avoid CROSS TALK ?
Hello Robert - excellent video, thank you! Question: For board edge clearance (tracks, components) you are using green lines on Mech Layer 14... also, one of your review points covered the NPTH being too close to tracks - why not fix these problems before starting the layout by setting up proper DRUs? I think it is very dangerous, to start a design with incomplete rules, don't you agree? Thanks!
What is the standards trace width for signal
Can you comment on the lane length matching vs impedance/crossover/crosstalk and frequency?
Seems like signals are matched to within a few mm while signals on them could tolerate 10-20mm differences with no effects...
I notice a lot of time and energy is spent in other designs to do this type of matching when it is not needed. Crosstalk or other returnpath related issues play a big role.
Very good comment. For modules, we usually do tight length matching as we never know where the module is going to be used and how other engineers are going to do layout on baseboards. However if you have full control over the whole connection, yes, many interfaces can be simply length match in centimeters / inches or they do not even need to be lengthmatched.
Got 2 little questions:
When you got the space - Is there any reason to not make the tracks as wide as you can? Ok, not 5 mm for a tiny signal wire but like why not 0.5 mm when you got the space, or 5 mm for a power-trace that only is supposed to carry like 1A.
And with free open areas the same - are the downsides to filling them with power/ground-planes?
it just lately i have often seen boards that not only are really spacious (like 5 components, 2 connectors and 1 small chip on an arduino-shield) but also 0.127 mm tracks with wide areas (like 1 cm) between each other.
Hey Robert kindly make tutorials for Xpedition as well
Hi Danish. Mentor doesn't want me to make videos. I have asked them some time ago.
Nice video.
Also talk about backdrill in PCB.
Thank you Muhammad. PS: I have never used backdrilling ... yet
@@RobertFeranec one more thing can you tell me about Tenting on via,. What is beneficial for this. I used it just for soldermask clearance with other components but I doubt it can effect on signal integrity.!
Please confirm
@@MuhammadAhsan-rr4js Once I left vias untented and I had to be extra careful to manipulate with be board as I was really worried to make short circuits. So I always tent vias.
very useful! keep doing this. you do a lot 45 degree lines why you dont use (when is possible) diagonal line ? its more shorter and less corners
Thank you Sahar. PS: We are using diagonal lines in some cases (e.g. fanout), however I have not considered to use them for long signals yet. Probably simplest reason would be that it could look messy, however real reason is, I have not really needed that. When we route we often have to route horizontally or vertically to make it easy to connect everything - I have a system how to organize, swap, connect together tracks in high density designs. If I would be just using straight lines, that could make it much harder.
Hi, I am very new in FPGA routing, I like this kind of video, is there any sources where I can learn step by step? I am using Altium Designer too
Thank you Lim PS: What would you like to learn step-by-step?
Thank you for sharing! can you make it a more shorter video? maybe put it in the different part
Hey robert, how did you expand (vertical) the bar with the files ?? Is this done due to version control ?
Thank you dear master
Thank you Juan
@@RobertFeranec :)
Sir I have created a PCB of Size 250X150MM size... with ATMEGA2560
Can you review my PCB?
Great video again; when it comes to length matching isn't it better to match propagation delays of the lines? As far as I know, delay matching takes effects of dielectrics into consideration; calculates travel speed and then matches the delays of the lines.
when you keep all of the tracks that need to be delay matched with respect to each other on the same layer referenced to the same planes length is same length is virtually identical to same delay, when you can not do that things get really tricky, also when you are including delay or length in package numbers given by the device manufacturer and for determining how much length variation is acceptable you need to have fairly good idea of the propagation speed in your traces
@@timun4493 I agree. Also, I have really bad experience with length matching based on propagation delay - that board never worked properly. And changing stackup or PCB manufacturer was nightmare - a little bit different stackup and propagation has changed. Plus ... I do not trust the software to calculate the propagation correctly - altium can't even calculate simple signal length properly (noticed differences in length between different altium versions?) so trusting the results of calculation of propagation delay - for me big no no.
@@RobertFeranec I have never tried; with this information will never :) thanks
Hello I am beginners in altium but i am use altium 20 so but you explain in altium 19 which has different order in your first video do to beginners ,i am so happy for your effort, but can give me advice how to start with altium 20
AD19 and AD20 are very similar. You should be able to figure out the changes by yourself. However if you still have any questions, you can ask on your forum here: designhelp.fedevel.com/
Hello bro, i am new to altum, using altium 09, facing one problem, that when draging components they disappear and appears when placed, same thing happened with track, after place line command after first left click or very first click track doesn't appear and paper when next click of place, please help me to find the settings are there to visible tracks when routing manually.
Hi Robert, I see you talk about your student designing DDR4. I've seen at your course for Advance Layout you cover up to DDR3. Do you have other courses covering that I'm missing ?
This was a custom client board - I do not have any new course board with ddr4.
Yes, please. Do more of this kind of videos. Very helpful for beginners like me.
Also, can you help me with an error in my Altium 18 I am currently struggling with right now? I always get this error window every time I open .pcbdoc file. Hope you can help. I've been struggling with it for 3 days now. I've uninstalled my version of Altium 18 and tried to install other versions like 18.1.6 and .7 but I still get the error every time.
Error:
List index out of bounds (5) at 0000000156872400.
, Base Address: 00000001564D0000.
Thank you Az. PS: I do not really know what the error is about, but often the problem can be in the file. Maybe try to "Save as ..." the file and try deleting the stuff from this temporary file until you find out what is causing the error.
Do get even better crosstalk performance, wouldn't it be even better to add a ground track or plane between these DDR3 tracks as some sort of a shield?
I do not do GND pour (I do not place GND on signal layers) as if not done properly, that can actually make the layout worse.
@@RobertFeranec i usually add a clearance rule for pour to impedance controlled net class of something like 5-10x height over plane to not cause to much impedance variation, similar reasoning as for deciding how much seperation to put between tracks to avoid crosstalk, you usually don't want structures on the same layer to significantly couple to each other and by keeping coupling to the return conductor that much stronger you can basically avoid pretty much all issues. for differential signals coupling is often introduced deliberately but only to archive required impedances while saving, if you have the space loose coupling is almost always better
What tool is being used for this? Please!
Do you mean Altium Designer?
Still not good: missing ground vias for return path.
Still in progress :)
Why do you place the green line? Could you not change the design rules for that?
Yes, you can use rules. PS: I didn't want to use rules, I only used the lines as some guidelines to tell me approximately where I can go with components and vias/tracks. You can see in some placed I went over the lines.
Robert, do you have used any software to program, test and compile a mircroprocessor? (like at Intel)
Juan, I am not sure what you mean .... do you mean microcontroller or processor and what architecture? For microcontrollers I use the software and tools what chip manufacturer provides, for processors ... it depends what CPU you have ... but again, I usually just use what chip manufacturer provides (however compilation, implementation, debugging is very different between architectures and sometimes even not really possible e.g. customizing BIOS is tricky)
@@RobertFeranec yes, you're right, software tools to syntetizer, debugging, spice, check code, simulation, assembly virtually a microprocesor's behavior before to start photolithography processor, like at ASML, thank for your reply
Is there any future in hardware?
There is always a lot of interesting opportunities for really good engineers.
Really useful video, but your English is hard to understand sometimes. Tracks, not trucks for instance. and so on. Your native is Italian?
Thank you. I am from Slovakia PS: I know about my pronunciation ... hmm .. tried to improved it couple of times, signed up for some classes in person, didn't help much
@@RobertFeranec Oh My God! We love Slovakia so much! You are lucky to live in such a great country. We visited Slovokia about year ago, Tatras is awesome! Good luck, thank you for useful videos!
Dont your hands hurt after hours of PCB design?
I talked about this topic in this video: ruclips.net/video/EW7tH5Mg1LQ/видео.html
Hold on, this is not Kicad! :(
Hi Martin, it is Altium. However, the content of the video is CAD independent and can be applied also in KiCad. Hope this helps.
Subtitle PLS :(
Yes, subtitles please. PS: RUclips is removing community subtitles support :(