FPGA & SoC Hardware Design - Xilinx Zynq - Schematic Overview - Phil's Lab #50

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  • Опубликовано: 19 ноя 2024

Комментарии • 119

  • @Eldon_Dice
    @Eldon_Dice 2 года назад +26

    I don't think you realize how your videos are helping us jr level engineers get through the first years of industry grind. I spend my free time watching your videos and others. I really appreciate your insight. More SOC videos please, really interesting.

    • @PhilsLab
      @PhilsLab  2 года назад +2

      Thank you very much for your comment, Edgar. Very glad to hear the videos have been helpful!

    • @Eldon_Dice
      @Eldon_Dice 2 года назад +3

      @@PhilsLab No, thank you for spending your free time on making these videos, apart from your full time career -- not easy. Your work is high quality.

    • @jordixboy
      @jordixboy Год назад

      as a self taught software engineer, with a decade in the industry, also thanks! I dont work in the electronics industry, but I do it as hobby, because learning is fun! thanks

  • @damny0utoobe
    @damny0utoobe 2 года назад +38

    What I like about your channel is that whenever I'm thinking about some design (zynq), you likely come out with it in a few weeks.

  • @vatsan2483
    @vatsan2483 2 года назад +10

    This series is highly looking forward to learn more about the layout and design in pcb!!

  • @shauni_jade
    @shauni_jade 2 года назад

    I literally started a subject at university on this yesterday, what a timing

  • @mohamedtebbo6095
    @mohamedtebbo6095 2 года назад +3

    Can't wait to see part 2 , where you do the layout of it !!

  • @tuloca011
    @tuloca011 2 года назад +4

    Great video as always Phil, thank you for making complicated topics accessible to us!

    • @PhilsLab
      @PhilsLab  2 года назад

      Thank you, Renato!

  • @xThirdOpsx
    @xThirdOpsx 2 года назад +1

    This content is golden, thank you so much for taking the time to putting it together. I will be soon supporting you with a purchase on your courses.

    • @PhilsLab
      @PhilsLab  2 года назад +1

      Thank you very much - very glad to hear that :)

  • @JasonFritcher
    @JasonFritcher 2 года назад +2

    As you get further with this series, are you planning on doing any videos on the PL design for the FGPA portion of the SoC? I'd be highly interested in seeing that, as a continuation of the hardware design.

  • @professorstabsalot
    @professorstabsalot 2 года назад +1

    This is outstanding! I am hoping you do a segment on PCB routing for the DDR.

  • @largepimping
    @largepimping 2 года назад

    I am never doing any of this, but I still find it very interesting. Another big "thank you for making this"!

    • @PhilsLab
      @PhilsLab  2 года назад

      Thank you very much for watching!

  • @ajays886
    @ajays886 8 месяцев назад

    thanks to you phils , I will start my hardware design .

  • @AD-lk2nv
    @AD-lk2nv 2 года назад +2

    love your work phil, brilliant content as always. been keen to design my own FPGA board at some point so this is great.

    • @PhilsLab
      @PhilsLab  2 года назад +1

      Thank you very much, hope you can get started with FPGA design soon!

  • @Cracked1ce
    @Cracked1ce 2 года назад

    Great video! I design with the Zynq RFSoC and MPSoC at work and this was a great refresher on FPGA circuit design. Also a very good selection on your power supply IC.

    • @PhilsLab
      @PhilsLab  2 года назад

      Thank you, Daniel!

  • @TheWhatnever
    @TheWhatnever 2 года назад +1

    Awesome! Im very curious about the DDR Routing. It's what kept me from designing my own board and using an SoM instead. Also I'm very curious of your background in in this topic. Because even with an SoM, teaching myself everything until Board Bringup was a crazy learning curve.

  • @tim21010
    @tim21010 2 года назад

    This is just perfect! I have a course with an introduction to zynq this semester and just started designing my on SoM (for the XC7Z010-1CLG400C) last week. Keep up the great work!

    • @PhilsLab
      @PhilsLab  2 года назад

      Awesome! I actually also previously did a design with the XC7Z010 (same package you are using) but saw these were in stock and immediately bought them. Good luck with your SoM!

    • @mth469
      @mth469 Год назад

      have you got anywhere with it?

  • @xy3986
    @xy3986 2 года назад

    Zett-Brett - einfach genial Phil- mach weiter so !! 🙂🙂🙂🙂🙂

  • @NivagSwerdna
    @NivagSwerdna 2 года назад +1

    Perfect. This is the sort of stuff that interests me... although on a slightly smaller (Lattice ice40) scale.

  • @dymastro788
    @dymastro788 2 года назад

    Thanks Phil, already looking forward to the layout & routing video!

    • @PhilsLab
      @PhilsLab  2 года назад +1

      Thanks very much, Rick!

  • @kushalkumarkasina9862
    @kushalkumarkasina9862 2 года назад

    I can't thank you enough for making this video.

    • @PhilsLab
      @PhilsLab  2 года назад

      Thank you for watching!

  • @igorb4650
    @igorb4650 2 года назад

    Whow, an awesome job on getting trough schematics and reasoning behind it!

    • @PhilsLab
      @PhilsLab  2 года назад

      Thank you, Igor!

  • @rjordans
    @rjordans 2 года назад +2

    This looks promising, looking forward to your next episode! You got me curious about the limiting elements in kicad though, looks like the new version has a lot of improvements in that regard

    • @PhilsLab
      @PhilsLab  2 года назад

      Thanks! I've yet to try out many of the improvements to KiCad 6, would be interesting to see how a design like this would fare there.

  • @maxhouseman3129
    @maxhouseman3129 2 года назад

    Great content! I think the most difficult thing is to program this fpga. I did that for my master thesis and it was crazy (I have 10 years of programming experience).

  • @danriches7328
    @danriches7328 2 года назад

    Looking forward to the serpentine traces on the DDR3L ram and how it compares to how I've started / starting routing a 12Gbps 4kp60 HDI interface, couldn't come at a better time!! Thanks Phil!!

    • @PhilsLab
      @PhilsLab  2 года назад

      Awesome, looking forward to making a video on it. Thanks for watching, Dan :)

  • @johnferrenby7486
    @johnferrenby7486 2 года назад +5

    IF you make full course on SoC PCB and Programming(Verilog/VHDL and C/C++), I will BUY that course.

    • @damny0utoobe
      @damny0utoobe 2 года назад

      You can't fit all of that into a single course.
      PCB, HDL and C++ will be their own courses.
      If you do try, then it ends up being a diet course which wouldn't be useful.
      With that said, I would purchase a series.

    • @dekev7503
      @dekev7503 Год назад

      @@damny0utoobe you're right. He might as well ask for him to make a complete Electrical Engineering masters degree course.

  • @XxEm202020xX
    @XxEm202020xX 2 года назад +4

    Do you plan on making any videos on programming/HLS with Vivado/Vitis? Looking forward to the rest of the series!

    • @PhilsLab
      @PhilsLab  2 года назад

      Yes, will be making programming videos once I have this board in my hands + the daughter board.

  • @CSFitness1
    @CSFitness1 2 года назад

    Awesome video, just started putting together schematic for my Zynq based SDR platform, more or less for the same reasons as you; to learn and say I can do it from the ground up. I started with the same approach as you grabbing all the datasheets and app notes, but eval board designs are invaluable (lots of slight variations to pay attention to). Looking forward to the layout video!

    • @PhilsLab
      @PhilsLab  2 года назад

      Thank you, Chris. Hope all goes well with your Zynq-based design. Did you manage to secure some Zynq chips?
      IIndeed, eval boards are incredibly helpful as well when doing these kinda designs.

    • @CSFitness1
      @CSFitness1 2 года назад

      @@PhilsLab yeah actually buying chips right now should be interesting…. I’m just gonna design to a certain variant and hope for the best.

  • @mth469
    @mth469 2 года назад +2

    Where can we get your schematics so we can follow along, sir?
    Preferably in PDF format.
    Thank you!

  • @mekbots7607
    @mekbots7607 2 года назад +1

    amazing ,please more
    of this

    • @PhilsLab
      @PhilsLab  2 года назад +1

      Thanks, more to come!

  • @vailotok5727
    @vailotok5727 2 года назад +1

    Hi Sir, where can download this Altium schematic file? Thanks, so cool.

  • @brokenicry
    @brokenicry 2 года назад

    can't wait for the layout video, as a professional PCB designer

    • @PhilsLab
      @PhilsLab  2 года назад

      Thank you!

    • @mth469
      @mth469 2 года назад

      i want to try doing a board design with this Zynq chip as a noob.
      I have some experience doing PCB design with stuff with pins.
      But nothing with BGAs.
      Am i crazy?

  • @piotrkaminski3443
    @piotrkaminski3443 2 года назад

    What i like to do is instead of just "listing" subsheets in the top level sheet i create sort of block diagram using sheet entries. This way it's easier to see how signals are connected between each sheet.

  • @yamanseyravan4387
    @yamanseyravan4387 2 года назад

    Perfect Work, i would love to see how to program those kind of systems !, keep the good work !

    • @PhilsLab
      @PhilsLab  2 года назад +1

      Thanks! Videos on that topic will be coming this year.

  • @greglaletin
    @greglaletin 2 года назад

    Wow, I was looking at the same reference board to make my own som for a quadcopter but can’t find the time to burn on it. Look forward to seeing how it turns out. Just from this video I know I would have stuffed up the ddr.

    • @PhilsLab
      @PhilsLab  2 года назад

      Yeah, the whole design is pretty time-consuming. Let's see if everything works at the end of the day :)

  • @angeldavidcastillocastro7816
    @angeldavidcastillocastro7816 2 года назад

    Excellent job my friend.

  •  Год назад

    Hi Phil, where did you get the symbol for the XC7Z007S? If you made it yourself, can you do a video on how you reliably make such a high-pin-count symbol without taking decades entering each pin from the datasheet? Thanks

  • @nicoladellino8124
    @nicoladellino8124 2 года назад

    Very impressive project 👏 👏 👏

  • @TheGhost13X
    @TheGhost13X 2 года назад

    Will you finish the control design course sometimes? Thank you!

  • @rajimordecai1099
    @rajimordecai1099 2 года назад +1

    Thanks my guy. Can you do more explanation on DDR interfacing to processors/FPGAs? I'm always confused with the data, address pins etc. Or point me to any link to learn this.

    • @PhilsLab
      @PhilsLab  2 года назад

      Thanks! Yes, will make a video on this when I have the finished board in my hands.

  • @johnferrenby7486
    @johnferrenby7486 2 года назад +1

    There are not many courses or books online on how to do SoC with simple explanations. Like where to click, how to setup basic stuff. They all go for advanced stuff right away

    • @johnferrenby7486
      @johnferrenby7486 2 года назад +1

      especially on How to Treat SDRAM/DRAM with SoC

  • @mohamedtaher6262
    @mohamedtaher6262 2 года назад

    Great work 👏 👏 👍, can you give us the altium project ?

  • @eraydurakk
    @eraydurakk 2 года назад

    Exellent job. Do you planing finishing sensor fusion series?

  • @RixtronixLAB
    @RixtronixLAB 2 года назад

    Nice info, thank you for sharing it :)

  • @MommeSherif
    @MommeSherif 2 года назад

    We really could use u in our company! Man! Good work!
    If u r interested I can talk to my boss, we are in Hamburg and Kiel!

  • @obregr
    @obregr 2 года назад

    intetretin as always

    • @PhilsLab
      @PhilsLab  2 года назад

      Thank you, Gregor!

  • @bennguyen1313
    @bennguyen1313 2 года назад

    Do you think the Avnet Ultrascale+ eval boards, would be a better choice than the older Zynq boards (MiniZed, Trenz ZynqBerryZero, etc)?

  • @joanlopezjimenez8336
    @joanlopezjimenez8336 2 года назад

    Hello, SoC programmation is the real future? it would me mandatory to learn about it? Certainly, its awesome.

  • @kamagongchannelofficial
    @kamagongchannelofficial 2 года назад

    thanks for sharing

    • @PhilsLab
      @PhilsLab  2 года назад

      Thanks for watching!

  • @babington77
    @babington77 2 года назад

    Hi Phil, More great content as usual. Thanks for taking the time to put this online. Really looking forward to see how you route this typically difficult Xilinx design onto a PCB. I know you will probably use Altium, but do you think it would be doable using KiCad?

    • @PhilsLab
      @PhilsLab  2 года назад +1

      Thank you, Tim. Definitely do-able with KiCad, however probably more of a pain in the neck than it needs to be, so yeah - I'll be using Altium.

  • @Mr_ASIC
    @Mr_ASIC 2 года назад

    give kicad some love

  • @anilsuha5301
    @anilsuha5301 2 года назад

    What's the density of Emmc and Qspi flash ? Can't wait a video about pcb.... I believe there will be 2 videos of pcbs one is only preparations and design rule settings and another one will be routing? 😍Thanks Phil

    • @PhilsLab
      @PhilsLab  2 года назад

      Thank you, Arun! I have several implementation videos for DSP content. The process for the PID controller is very similar.

    • @anilsuha5301
      @anilsuha5301 2 года назад

      @@PhilsLab Phil..... I'm a big fan of your work. You put soo much effort and the outcome is really good. Thanks for all the knowledge. And yes I've seen all your videos.

  • @samba8579
    @samba8579 Год назад

    i want to ask one thing.. how to generate .bd file from schematic diagram?

  • @Slicomful
    @Slicomful 2 года назад

    That is a nice jump. From simple mcus to complex fpga) I love it! I have to take back the comment I left on last video. Please make a video of routing, not just showing the result. Result is not interesting, process is much more interesting) Thanks.

    • @dymastro788
      @dymastro788 2 года назад

      The whole process would be great indeed! The whole tought process etc

    • @PhilsLab
      @PhilsLab  2 года назад

      Thanks, Alex. I'll probably show aspects of the routing but not the entire process as that would take many, many hours.

  • @RafaelVieira-wx9ux
    @RafaelVieira-wx9ux 2 года назад

    when it comes down to fpga programming, do i need to care about eletronics? isn't it always only logic gates and hardware description languages? im new on the field

  • @anilsuha5301
    @anilsuha5301 2 года назад

    Oh oh ohhhhh 😍😍😍😍

  • @pranavmokashe1637
    @pranavmokashe1637 Год назад

    Design files available for download?

  • @oraszuletik
    @oraszuletik 2 года назад

    Nice!

  • @pasblo39
    @pasblo39 2 года назад

    One question, do you create your own components in Altium designer or do you use a component library? If the latest is true, which one?

    • @PhilsLab
      @PhilsLab  2 года назад

      I usually create my own symbols and footprints. Altium Designer has an IPC-compliant footprint wizard which is really helpful.

  • @theonlyari
    @theonlyari 2 года назад

    Damn! This is a deep one! I really like that this isnt meant for the hobbyist group- not that theres a problem with that, but theres enough of that content already on youtube. I noticed that you didnt mark your diff pairs with the diff pair parameter. Is there a different way to do this in Altium?

    • @PhilsLab
      @PhilsLab  2 года назад

      Thank you, glad to hear that! Yeah, I hadn't marked the PL pins as diff pairs yet, as I'm still undecided how many of them I'll be making single-ended or differential.

  • @jack_brooks
    @jack_brooks 2 года назад

    Can you go over the costs associated with software development tools and IP needed to be purchased to do this SOM? These costs can be extreme in low volumes, and the vendors don't make this info clear. They just assume you are going to buy everything.

    • @PhilsLab
      @PhilsLab  2 года назад

      Vivado is free and supports (most) 7-series FPGAs/SoCs without an additional license. Won't be needing any paid IP for this design. So software development brings no costs with it so far.
      The PCB manufacturing + assembly costs in low volume will be quite substantial however.

    • @jack_brooks
      @jack_brooks 2 года назад

      @@PhilsLab I only have experience with Altera products and I have to work on a zero dollar budget. DDR3 IP was not free with the free version of Quartus (at least at the time, I don't know about today), so I was limited to old SDRAM in my designs. Because I have zero dollars to work with, I end up using cheap eval boards as SOM's. But everything is going DDR3, so even that doesn't work because I couldn't use the memory without getting a paid Quartus license. I was assuming you needed to use a paid license of Vivado to do what you are trying to accomplish.

  • @guruG509
    @guruG509 2 года назад

    Can you do a video on DFT?

    • @PhilsLab
      @PhilsLab  2 года назад +1

      Might make a video on the FFT in the future.

  • @PapuavTronics
    @PapuavTronics 2 года назад

    Can you please create a paid video course on how to create this fpga SOM on Udemy or something, Please. I really want to learn how to design a SOM fpga.

    • @PhilsLab
      @PhilsLab  2 года назад

      Yeah, my plan is to create a course on FPGA/SoC-based hardware design. It won't be on Udemy I'm afraid but rather on Fedevel Academy.

    • @PapuavTronics
      @PapuavTronics 2 года назад

      @@PhilsLab Thankyou so much Phil

  • @franzliszt3195
    @franzliszt3195 Год назад

    So many capacitors in parrelle. Why not just one bigger one?

    • @PhilsLab
      @PhilsLab  Год назад

      Physical placement on the PCB, close to relevant power/gnd pins.

    • @franzliszt3195
      @franzliszt3195 Год назад

      Yes, but why 4 caps next to each other? Wouldn't one on each end be enough? Thank you for the reply.@@PhilsLab

  • @mth469
    @mth469 2 года назад

    the schematic meistro...
    if you please.

  • @Narindersingh-ss7pb
    @Narindersingh-ss7pb 6 месяцев назад

    Har har Mahadev

  • @perceptron9834
    @perceptron9834 2 года назад

    I the past you did a lot with global labels now you are connecting all elements direct to the MCU. Why did you change your mind?

  • @tomaszkluska6419
    @tomaszkluska6419 2 года назад

    Jednak AMD a nie Intel.
    Bardzo dobrze.

    • @PhilsLab
      @PhilsLab  2 года назад

      True - however, I think I'll still be referring to these as Xilinx for a while :D

    • @tomaszkluska6419
      @tomaszkluska6419 2 года назад

      @@PhilsLab Always :)