Fixing the 74LS157 Signal Integrity Problem on the Eater SAP-1 Computer

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  • Опубликовано: 29 дек 2024

Комментарии • 27

  • @vincentcifello4435
    @vincentcifello4435 6 месяцев назад +1

    Amazing job figuring this out and providing a solution!

  • @nevenlukic
    @nevenlukic 2 года назад +1

    Thank you and everyone included in this thread for this explanation! After wiring everything I realized that this is happening with my RAM, a whole day of trying to debug it I was exhausted. This saved my day and now I can finally continue and write my first program :)

  • @TSM_149
    @TSM_149 Месяц назад +1

    Thank you very much!!!! It helped me a lot in solving the problem🙏👍

  • @andreamazzai1969
    @andreamazzai1969 2 года назад +1

    Thank you for your detailed explanation, very useful for a better understanding on what's under the hood.

  • @IslandHermit
    @IslandHermit Год назад +2

    A more general fix would be to latch the outputs of the 74LS157, though that would add another chip.

    • @MichaelKamprath
      @MichaelKamprath  Год назад

      How would you do that when the 74LS157 output here is not intended to be synced with a clock and instead have immediate effect?

  • @Aftertea_time
    @Aftertea_time Год назад

    Thank you,you are my life saver!I deal with it all day and find this video!

    • @Aftertea_time
      @Aftertea_time Год назад

      and here is another question,if i change the address , sometimes when i switch back to the origin address, the data will be changed.

    • @MichaelKamprath
      @MichaelKamprath  Год назад

      Happy it was helpful for you!

    • @Aftertea_time
      @Aftertea_time Год назад

      never mind,i fixed it

  • @tuzztech6824
    @tuzztech6824 2 месяца назад

    Thanks, I had exactly the same problem and this fixed it. Great explanation!

  • @phillafco1039
    @phillafco1039 3 года назад +1

    Nice rundown. I was having a similar problem myself.

  • @basak101
    @basak101 11 месяцев назад

    Thank you for the explanation, great video

  • @Srednicki123
    @Srednicki123 Год назад

    Could you tell me the measurements of the whole computer? These are eight breadboards one each side, but some power rails are taking off, right?

  • @clayatkins6892
    @clayatkins6892 Год назад

    Ok I have a question about the Schottky diode part of the solution. When the clock goes high the capacitor is charged. when the clock goes low how does the capacitor discharge with the Schottky diode in the way of current flow?

    • @MichaelKamprath
      @MichaelKamprath  Год назад +1

      Note that on the other side of the capacitor from the diode is a connection to ground through a resistor. That pulls the voltage down on the capacitor side when the clock goes low. It is in fact a “pull down resistor”.

    • @MichaelKamprath
      @MichaelKamprath  Год назад

      But I realize you mean what discharges the diode side of the capacitor. Admittedly I don’t have a good answer on how the electrons flow there. I can tell you (based on oscilloscope) the voltage does drop.

  • @clayatkins6892
    @clayatkins6892 Год назад

    Thank you.

  • @labamichnetvoll5911
    @labamichnetvoll5911 3 года назад

    What did you use exactly for a schottky diode?

    • @MichaelKamprath
      @MichaelKamprath  3 года назад +2

      A BAT43 diode.

    • @labamichnetvoll5911
      @labamichnetvoll5911 3 года назад

      @@MichaelKamprath thanks,
      Doesn’t it matter if the input of the ram ICs is inverted? I use the 74LS219 instead of the 189 . Can I invert the write pulse there too?

    • @MichaelKamprath
      @MichaelKamprath  3 года назад

      @@labamichnetvoll5911 It matters insomuch that you have the sense of the signals right to the bus. The original design uses inverters to make the RAM out put active high because the RAM is active low. If you use active high RAM, the you should get rid of those inverters.