Exactly, As stated on the outro, I'd like to focus more on "project reports" in the future, giving little to no details, but still giving ppl a nice github for them to do it on their own. Finding the balance is actually pretty hard haha
My friend actually did kind of the same for his bachelor's diploma work. He wrote a neuronetwork that identifies a modulation mode for the inputted signal and then put it on a FPGA. I thought it wasn't that hard when he explained it to me, but after watching this video I changed my mind, It is quite hard. He won the local diploma work contest with this work by the way. Maybe I will try to do the same for my diploma work this year. Thanks for inspiration!
hey man im in my first semester for my EE degree, I plan to write a research paper and I'm laying out the framework right now. This is SUPER duper gonna help me as I do some parallel wicked type learning thing I do for myself while the landscape changes.
Hi ive been following along with this project and am super interested I actually want to do this as a project however I'm curious as in the initial video you mentioned you wanted to create a full 10hr course on how to do this project is the github tutorial the course you were mentioning? i would love to hear back from you and FYI is this a super cool project
The course is open source, it is pinned on my gihub profile (with all of the slides). However, the notebooks are not as detailed and the slides may be tricky to understand without a lecturer. If you have any trouble, don't hesitate to check the learning resources on the github or use the comments section on this post on my blog : 0bab1.github.io/BRH/posts/PY2FPGA/ (because these actually sends me notifications and are easier to work with for troubleshooting.) PS : the blog is something I'm actively working on right now, you are officially the first beta tester / early access member ;)
Hey, maybe you can use the packaged IP in quartus ? I never really left the Xilinx thing when it comes to using FPGAs. I'll let you try that, tell me how it goes ;)
Hello, the course is open source, pinned on my github profile. But it was meant to be teached live so I don't know if you'll get more infos there but the slides might help. You also have this blog post 0bab1.github.io/BRH/posts/PY2FPGA/ that might help. I saw your other comment. I am busy right now working on the next video. But I can always try to help. Where can we get in touch ?
Thank you ! Frankly I started doing these videos because it was pretty much hard to find. As of right now, I don't have many recommendations if not Phil's lab (RUclips) and Adam Taylor (internet blog) as reliable information sources
Hello, I am currently doing the same project. But I am trying to perform object detection tasks with a quantized YOLO model, and create the stich IP so i can integrate it into the KV260 KRIA FPGA board as the deep learning unit to run inference and output it via HDMI. But I seem to get stuck on the out of context synth, another problem is when i ran synthesis on the stiched IP in vivado, it just kills me VM OS due to limited resources. I used 2024.1 version of the XIlinx tool chain, do you think this will be an issue? Since I saw you use 2023.2 verison, but the FINN documentation recommended the 2022.2 version.
Hello, great project ! I never tried models as complex as yolo but a general recommendation is to stick with older versions of vivado (from 1-2 years ago) as the most recent ones tends to have unknown "features" (bugs) and older ones tend to have better support. I also know using a VM can limit vivado sometimes. The best is have a real machine for that but I don't know how much of a difference that can make. Hope this helped, do you have any specific error ?
@@BRH_SoCThats good, though if you are still a freelancer who wants some easy money (Doctor salary for 5 hours), feel free to let me know, since i'm on a time crunch to get this done. I do have to say that after 2 weeks, I wont need any assistance since the deadline for my research on this assignment will be over.
@@BRH_SoC Also please stay active! I have many questions! Even if you cant immediately do a paid 1-1 live session, just asking you questions here will save me TONS of time. Like for example, the end goal of the first half was to simply generate three different onnix files right? Though only 1 is used?
@@BRH_SoC Also, if your still a free-lancer, lmk becuase I am 100% willing to give doctor level rates for training since I am on a time crunch to get this done for school
I talked briefly about it in the video. Training time is longer when using quantized aware training. In the backend, the computer simulates quant error in order to let the model "adapt". Alongside more complex backward propagation, it requires more time indeed. You can also train normally and use Post Training Quantization, which works but the model is not adapted leading to greater loss. It all depends on your requirements, hope it helped ;)
I am not sure how having the details of the project make this as entertaining as possible
I think he meant that i won't go into details in the video, but leaving it for people who wants to try
Exactly, As stated on the outro, I'd like to focus more on "project reports" in the future, giving little to no details, but still giving ppl a nice github for them to do it on their own.
Finding the balance is actually pretty hard haha
My friend actually did kind of the same for his bachelor's diploma work. He wrote a neuronetwork that identifies a modulation mode for the inputted signal and then put it on a FPGA. I thought it wasn't that hard when he explained it to me, but after watching this video I changed my mind, It is quite hard. He won the local diploma work contest with this work by the way. Maybe I will try to do the same for my diploma work this year. Thanks for inspiration!
Good luck to you :)
Bro this is sick, great job!
Thanks bro
hey man im in my first semester for my EE degree, I plan to write a research paper and I'm laying out the framework right now. This is SUPER duper gonna help me as I do some parallel wicked type learning thing I do for myself while the landscape changes.
Good luck with your research ! Especially if you have do deal with backward propagation haha
@@BRH_SoC ive got absolutely no idea but i hope within a couple of years ill have the understanding to get actually started with the paper hahahahah
Amazing job
Good luck buddy🎉
great video, loved it!
Well done! Cool to have a follow up to your last vid.
I hope your channel goes places! 🚀
Cheers mate ! 🚀
love these videos, Keep making these
Sure will !
Hi ive been following along with this project and am super interested I actually want to do this as a project however I'm curious as in the initial video you mentioned you wanted to create a full 10hr course on how to do this project is the github tutorial the course you were mentioning? i would love to hear back from you and FYI is this a super cool project
The course is open source, it is pinned on my gihub profile (with all of the slides).
However, the notebooks are not as detailed and the slides may be tricky to understand without a lecturer.
If you have any trouble, don't hesitate to check the learning resources on the github or use the comments section on this post on my blog : 0bab1.github.io/BRH/posts/PY2FPGA/
(because these actually sends me notifications and are easier to work with for troubleshooting.)
PS : the blog is something I'm actively working on right now, you are officially the first beta tester / early access member ;)
Great content, don’t try to be employable, keep it up with this content
Can you do a one with quartus? 🥺
Hey, maybe you can use the packaged IP in quartus ? I never really left the Xilinx thing when it comes to using FPGAs. I'll let you try that, tell me how it goes ;)
IN the Github it says theres a 9 hr course. Where can I buy it?
Hello, the course is open source, pinned on my github profile. But it was meant to be teached live so I don't know if you'll get more infos there but the slides might help. You also have this blog post 0bab1.github.io/BRH/posts/PY2FPGA/ that might help.
I saw your other comment. I am busy right now working on the next video. But I can always try to help. Where can we get in touch ?
can you recommend other youtube channels that make similar content for fpgas/soc/hardware? By the way great vid!
Thank you ! Frankly I started doing these videos because it was pretty much hard to find. As of right now, I don't have many recommendations if not Phil's lab (RUclips) and Adam Taylor (internet blog) as reliable information sources
Win Win
Hello, I am currently doing the same project. But I am trying to perform object detection tasks with a quantized YOLO model, and create the stich IP so i can integrate it into the KV260 KRIA FPGA board as the deep learning unit to run inference and output it via HDMI. But I seem to get stuck on the out of context synth, another problem is when i ran synthesis on the stiched IP in vivado, it just kills me VM OS due to limited resources. I used 2024.1 version of the XIlinx tool chain, do you think this will be an issue? Since I saw you use 2023.2 verison, but the FINN documentation recommended the 2022.2 version.
Hello, great project ! I never tried models as complex as yolo but a general recommendation is to stick with older versions of vivado (from 1-2 years ago) as the most recent ones tends to have unknown "features" (bugs) and older ones tend to have better support.
I also know using a VM can limit vivado sometimes. The best is have a real machine for that but I don't know how much of a difference that can make.
Hope this helped, do you have any specific error ?
Can you help me get this working for my board 1-on-1? I'll pay
I replied to your other comment on the tutorial to answer your questiobs
Questions *
@@BRH_SoCThats good, though if you are still a freelancer who wants some easy money (Doctor salary for 5 hours), feel free to let me know, since i'm on a time crunch to get this done. I do have to say that after 2 weeks, I wont need any assistance since the deadline for my research on this assignment will be over.
@@BRH_SoC Also please stay active! I have many questions! Even if you cant immediately do a paid 1-1 live session, just asking you questions here will save me TONS of time. Like for example, the end goal of the first half was to simply generate three different onnix files right? Though only 1 is used?
@@BRH_SoC Also, if your still a free-lancer, lmk becuase I am 100% willing to give doctor level rates for training since I am on a time crunch to get this done for school
how much took time the training process . Is it less that regular systems?
I talked briefly about it in the video. Training time is longer when using quantized aware training. In the backend, the computer simulates quant error in order to let the model "adapt". Alongside more complex backward propagation, it requires more time indeed.
You can also train normally and use Post Training Quantization, which works but the model is not adapted leading to greater loss.
It all depends on your requirements, hope it helped ;)
Employmaxxing
I'll do finance FPGA to do some moneymaxxing ;)
Zeroth komment
Have my babies
I feel like I should pin your comments haha
@BRH_SoC acorn reduced instruction set computer machine