Well, the input bias current depends on the type of op-amp - BJT-based op-amps will have some bias current, JFET-input op-amps will have a lot less (reverse-biased diode leakage current), and MOSFET-input op-amps have essentially none (pico to femtoamp range) unless they have protection diodes on the inputs. That said, even FET-input op-amps will have some transient currents in the inputs as the gate capacitances charge or discharge.
Sir I use lmc660cn op amp In transimpedance mode I to V converter , I used 100 mega ohm resistor 8n feedback And non inverting terminal ground direct and inverting terminal floating but my op amp output shows 1.8 v continue either I ground or floating. Inverting terminal. How to fix this problem I have to measure Pico ampere
In general, is it true that the resistance seen from the inverting input of the op. amp. has to be equal to the resistance seen from the non inverting input, to reduce the effect of the bias currents?
Unfortunately they will rarely be exactly equal. The input bias is mainly a problem affecting op-amps using BJTs where each input leads to the base of a transistor. But due to nonlinearity in the transistor curves, the effective input impedance has a bit of dependence on the current, making the input bias variable. But since the transistors are usually fabricated near one another on the same chip, it's still a reasonable approximation to assume they're just equal and constant.
@@adanner thank you for the answer; sorry, I meant the resistance from the inverting (or non inverting) input *and* ground, not the resistance of the op. amp. input but the one created by the external resistor network around it. In the example of the video the resistance seen from inverting input is the parallel of R1 and R2 and selecting for the value of the “balancing” resistor, connected to the non inverting input, a resistance of value R1//R2, the base current (IB) effect can be minimized. I wonder if this is valid in general
In the video on Input Offset Voltage you assumed no Input Bias Current, in this video you assume no Input Offset Voltage. How convenient ... 😄 In real life they are both present and influence the output voltage. A video that would analyze them both would be cool! Great job anyway!
Thank you for this video Aaron, I was recently wanting to learn more about this phenomenon and then your video suddenly appeared in my feed.
Very good. Well explained. Thanks!
Very useful video! Please keep up. thank you.
Well, the input bias current depends on the type of op-amp - BJT-based op-amps will have some bias current, JFET-input op-amps will have a lot less (reverse-biased diode leakage current), and MOSFET-input op-amps have essentially none (pico to femtoamp range) unless they have protection diodes on the inputs. That said, even FET-input op-amps will have some transient currents in the inputs as the gate capacitances charge or discharge.
Sir I use lmc660cn op amp In transimpedance mode I to V converter , I used 100 mega ohm resistor 8n feedback
And non inverting terminal ground direct and inverting terminal floating but my op amp output shows 1.8 v continue either I ground or floating. Inverting terminal. How to fix this problem
I have to measure Pico ampere
Perfect, thank you!
In general, is it true that the resistance seen from the inverting input of the op. amp. has to be equal to the resistance seen from the non inverting input, to reduce the effect of the bias currents?
Unfortunately they will rarely be exactly equal. The input bias is mainly a problem affecting op-amps using BJTs where each input leads to the base of a transistor. But due to nonlinearity in the transistor curves, the effective input impedance has a bit of dependence on the current, making the input bias variable. But since the transistors are usually fabricated near one another on the same chip, it's still a reasonable approximation to assume they're just equal and constant.
@@adanner thank you for the answer; sorry, I meant the resistance from the inverting (or non inverting) input *and* ground, not the resistance of the op. amp. input but the one created by the external resistor network around it. In the example of the video the resistance seen from inverting input is the parallel of R1 and R2 and selecting for the value of the “balancing” resistor, connected to the non inverting input, a resistance of value R1//R2, the base current (IB) effect can be minimized. I wonder if this is valid in general
Superb.
In the video on Input Offset Voltage you assumed no Input Bias Current, in this video you assume no Input Offset Voltage. How convenient ... 😄 In real life they are both present and influence the output voltage. A video that would analyze them both would be cool! Great job anyway!
Sir you are best !!!!!