STA_L1b - Overview of VLSI Frontend Design Flow

To understand the importance of STA, it's very important to know VLSI Design flow and how different timing checks are required at different stages.
In previous video, I have discussed generic VLSI Design Flow. (Link of previous video : • STA_L1a - Overview of ... )
In this part - I have captured an overview of VLSI Frontend Design Flow (RTL to Gate-level Netlist).

[@johnyvicewax7375]

Sir ,
10 minutes frontend clear and plain explanation.
Easy to understand.
Thank you

[@luckeylokesh1952]

I'm buying this course online sir

[@adorablegeorgieee9948]

How is system specifications documented?

[@luckeylokesh1952]

But I have some doubt how to contact u sir

[@entrainmentonly3698]

Can you send me ppt sir