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@@EngineeringFunda please sir help me understand this question........... Exercise: A ramp ADC has a clock running at a frequency of 1MHz. The input voltage ranges from 0 to 40.95V for a 12-bit output. Determine: (i) The resolution of the ADC. (ii) The digital equivalent of 7.828V. (iii) The conversion time for VA = 7.828V . (iv) The maximum conversion time for this converter.
Your positive comments motivates me. Teachers like me just wants positive comment from student. Love from you guys means a lot to me. My goal is to create largest community of engineers in entire globe. Please help me by sharing this playlist with your friends.
Your positive comments motivates me. Teachers like me just wants positive comment from student. Love from you guys means a lot to me. My goal is to create largest community of engineers in entire globe. Please help me by sharing this playlist with your friends.
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..... your way of explaining things is awesome. Your english is simple and understandable . Please keep it up 👏👍👏
Your positive comments motivates me.
Teachers like me just wants positive comment from student.
Love from you guys means a lot to me.
My goal is to create largest community of engineers in entire globe. Please help me by sharing this playlist with your friends.
@@EngineeringFunda please sir help me understand this question...........
Exercise:
A ramp ADC has a clock running at a frequency of 1MHz. The input voltage ranges from 0
to 40.95V for a 12-bit output. Determine:
(i) The resolution of the ADC.
(ii) The digital equivalent of 7.828V.
(iii) The conversion time for VA = 7.828V .
(iv) The maximum conversion time for this converter.
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Tq sir for clear and neat expalination....
Which is helping me to prepare good fr my exams tq somuch
Your positive comments motivates me, Thanks and welcome 🙏
love u sir. thank u so much... tomorrow i have an exam....
Your positive comments motivates me.
Teachers like me just wants positive comment from student.
Love from you guys means a lot to me.
My goal is to create largest community of engineers in entire globe. Please help me by sharing this playlist with your friends.
Your teached Awesome sir
@@randhiryadavnc taught*
Very nice explain sir 😘😘😘
Your welcome
Very good explanation sir
Your positive comments motivates me, Thanks and welcome 🙏
Simple and amazing explaination👍
Your positive comments motivates me.
Teachers like me just wants positive comment from student.
Love from you guys means a lot to me.
My goal is to create largest community of engineers in entire globe. Please help me by sharing this playlist with your friends.
Thank u sir
Very nice explanation 👏👏🤗
All the subjects playlist of Engineering Funda is available in comment section. Share it with your friends to support us.
Your positive comments motivates me and person like me get boosted by my students feedback. Thanks and welcome 🙏
It's very helpful for me...thank u so much sir... Well explained....I request to u sir plzz theory b likhkr explain kriye,🙏.
✅ noted
Sir in the place of ramp ADC can we write this theory??
Both r similar??
Yes it is single ramp ADC only
Thankyou sir.😀
Your positive comments motivates me, my goal is to create largest community of engineers in entire globe, so please help me for that by sharing this lecture series(playlist) with your friends in social media (watsapp, telegram etc). Thanks and welcome 🙏
Sir...plz make videos on analogue electronics
After staircase output by dac then what will be buffer output
🙏🙏
current steering and charge scaling viedeo is mising in DAC