Others have also pointed out mostly: If you take some (about 1/2) of the buffered drain voltage and add it to the gate, the distortion is a lot less. If you select a JFET with a large Vgs(off), distortion is usually less. If you build two copies and use signals of opposite polarity the difference signal out has less distortion. Clever things can be done to make the gain vs voltage linear. They generally involve a small "DC" component to the signal being controlled.
Worth noting if people did not notice: All signals was positive, not symmetrical around 0, the JFET will not be a happy little controllable resistor when the Drain voltage is lower than Source voltage
That is not entirely true. If you use a JFET with a large Vgs(off), you can bias the gate at something like -5V and still have it be a low resistance. You have to go to something like -7V to get a high resistance. On a lot of JFETs, you can have a negative signal so long as it is less than about -4V and it is fine.
I did some experiments years ago with JFET attenuators and a distortion analyser. It helps a lot to add half of the Drain voltage into the Gate control, typically using a 1M resistor between Drain and Gate, and then another 1M resistor from the Gate to the control voltage. Of course this means the control voltage now has to swing twice as far for the same effect, but that is easy to set up with an op-amp. I have not done the maths, but suspect that this helps to cancel out the square law transfer characteristic.
I did not know there was a distortion analyzer test box. I learned something new. I always did a FFT and calculate distortion that way. Of course, you can do it with Spectrum analyzer, too. Your input signal might be too large for this circuit. In RF we have something called 1dB compression, which kinda limits the maximum input signal. Also, putting a resistor on the source of jfet could help improve (reduce) your distortion and eliminate the need to put negative voltages on the gate of jfet. Also jfet should be AC coupled to the rest of the circuit (putting capacitor between the drain of jfet and mid point of two resistor). This keeps JFET in Ohmic region, since then the DC bias on the drain will be always zero. If you want to do both putting resistor in the source and AC couple the jfet you need to bias jfet with a current source and bias the jfet in ohmic region.
Distortion analyzers have been around for a long time, the Hewlett Packard 334A was classic but there were others. the Keithley uses FFT inside but the older ones probably used a bridge.
I was going to say the same thing about the importance of keeping the JFET in its ohmic region if you want to avoid distortion. The 1V pp input signal is really too high for this application, especially where Vp is only about -2V which means the FET will pinch-off and leave the ohmic region at that sort of voltage from drain to source as well. It's compounded, of course by not allowing the signal to swing both positive and negative at the drain. An FET in its ohmic region is effectively non-polarised for small signals, so by working with, say, 200mVpp ac-coupled, the FET would only see 100mV each way and that would reduce the distortion by an order of magnitude or more.
@@RexxSchneider You are right usually they put AGC at early stages so that signal level is low. Here is a circuit for large signal Automatic audio leveling circuit: ruclips.net/video/1h0FZJYXQ_w/видео.html You know the best way to learn is from mistakes, and one of the things I like about IMSAI Guy's videos is that he makes lots it for us, I think on purpose, to draw attention to detail of circuit.
Really cool! Perhaps one way to reduce distortion would be to attenuate the signal prior to this voltage-controlled stage and then reamplify it by the same amount following this stage. That may add a little extra noise, but it may be worth it depending on application.
Perhaps a better idea is to attenuate only the low frequencies. Above about 2KHz, amplitudes tend to be decreasing anyway. This way you are less likely to make a hiss.
To maintain a decent linearity you have to keep the signal as low as possible. With 1V peak you are really pushing the jFet. Do the same with 0.1V peak to peak. Of course you'll have to amplify with a second stage and this is not ideal for noise. Another problem is that it's highly recommend to keep the signal>0 like you did. It will work with small negative excursions but the distortion will come back very fast.
John Pierce named the transistor from combining “Transconductance” and “Variable Resistor”. His proposal along with others were submitted for a vote inside the lab to officially name the device, and “transistor” was the overwhelming winner. On a side note related to the video, Pierce was quite involved in computer generated music. He used to host parties at his home while he was a professor at Stanford, and it was quite an honor to be invited. Music was often in the spotlight. He died about 20 years ago. He had quite the mind.
couldn't you make an extremely simple AM transmitter with this? audio goes on the gate, carrier signal goes on the resistor, the magnitude of the carrier will change with the audio signal, hence amplitude modulation
You are missing a key benefit of JFETs in your circuit. JFETs have a very high input impedance. You are feeding it with 50 ohms. You want to impedance match this, which will give you a huge increase in amplification and decrease in noise (reducing the SNR by adding passive gain in front of the FET). For instance, a simple way is to use an impedance transformer that takes the 50 ohms input signal to about 1M ohm (which is the input impedance for many JFETs), which is a step up in voltage, allowing for huge gain (depending on transformer losses at the frequencies of interest). Of course, to deal with distortion, a transformer might not be the ideal solution all alone since the impedance match is complex (meaning that it involves capacitances and inductances, not that it is hard). Usually, JFETs come into circuits because they are lower noise than MOSFETs or other types of transistors. This is why you find them in microphone preamps or RF preselectors. A future video might try to show that advantage, which is more interesting than just gain.
wow, you really missed the idea of this circuit, since you are interested: JFET amp: ruclips.net/video/rJb1eVR30dY/видео.html Microphone amp: ruclips.net/video/8IS7rScFL2U/видео.html
@@IMSAIGuy I guess the title of the video threw me off… I get that this is in your synthesizer thread of thought, and you cover that well, but I was just making suggestions. I like the nostalgia of it all, but there is also a lot that is still relevant and useful about all of these old parts and circuits.
I had this same idea a couple of days ago, except I wanted to use the FET as a voltage controlled resistor in the feedback loop of an op amp to control the gain. It seemed like a reasonable idea to me, but I couldn’t get my circuit to work properly; it kept breaking into oscillation, really just didn’t work at all. Maybe I wasn’t biasing the FET correctly? Not sure what I was doing wrong, any suggestions?
There are a couple of considerations for using an FET as a voltage-controlled resistor (i.e. in its ohmic region): (1) The voltage between drain and source has to be kept low, significantly less than a volt, preferably more like 100mV or so. If not, the FET will become an amplifier (in its triode region) and will amplify any signals it picks up between gate and source. That may result in oscillations, depending on layout, etc. (2) The voltage at the source has to be kept steady with respect to the gate, otherwise variations in the voltage at source are effectively modulating the gate-source voltage, and will manifest as a signal to be amplified, with a similar potential to cause oscillations. You didn't say whether you were using a non-inverting or an inverting amplifier, but you can see that using the FET as the feedback resistor of an opamp will cause problems if the output exceeds a few hundred millivolts. You might get away with using an FET as the lower leg of the feedback divider in a non-inverting amplifier (source connected to ground), but you'll then be limited to an input signal of a few hundred millivolts, and the gain then depends on the reciprocal of the FET resistance, which isn't so bad as it's non-linear anyway.
@@RexxSchneider all of this makes sense. I was using an MPF102 JFET because it was what I had on hand. I knew that the gate had to be reverse biased with respect to the source, but I didn’t know exactly how to do that. I biased it with a trim pot between + and - 5V rails; set to about -1V on the wiper (gate). Negative feedback in the op amp, with source on negative input and drain on output. Positive input grounded, I think I was using a 10k resistor to negative input. I might play around with this some more; thanks for your suggestions.
Yes, of course! Tying the source directly to ground should keep the FET well behaved, plus it will make it easier to control the gate bias. Great, I’ll try it, thanks!
I don't get it, why would a near pure resistive (I assume) be so non-linear with voltage? I use 99% mosfets, so I think I need to hjt the data sheets on JFETs! :) Maybe you might try it with a 2N7000 mosfet?
Shouldn't the circuit be described as a "voltage controlled attennuator" and not an "amplifier"? The JFET isn't actually used as an amplifier in this case.
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Others have also pointed out mostly:
If you take some (about 1/2) of the buffered drain voltage and add it to the gate, the distortion is a lot less.
If you select a JFET with a large Vgs(off), distortion is usually less.
If you build two copies and use signals of opposite polarity the difference signal out has less distortion.
Clever things can be done to make the gain vs voltage linear. They generally involve a small "DC" component to the signal being controlled.
Worth noting if people did not notice: All signals was positive, not symmetrical around 0, the JFET will not be a happy little controllable resistor when the Drain voltage is lower than Source voltage
That is not entirely true.
If you use a JFET with a large Vgs(off), you can bias the gate at something like -5V and still have it be a low resistance. You have to go to something like -7V to get a high resistance. On a lot of JFETs, you can have a negative signal so long as it is less than about -4V and it is fine.
Yes, they liked it, distortion gives the synth character.
I did some experiments years ago with JFET attenuators and a distortion analyser. It helps a lot to add half of the Drain voltage into the Gate control, typically using a 1M resistor between Drain and Gate, and then another 1M resistor from the Gate to the control voltage. Of course this means the control voltage now has to swing twice as far for the same effect, but that is easy to set up with an op-amp. I have not done the maths, but suspect that this helps to cancel out the square law transfer characteristic.
I did not know there was a distortion analyzer test box. I learned something new.
I always did a FFT and calculate distortion that way. Of course, you can do it with Spectrum analyzer, too.
Your input signal might be too large for this circuit. In RF we have something called 1dB compression, which kinda limits the maximum input signal.
Also, putting a resistor on the source of jfet could help improve (reduce) your distortion and eliminate the need to put negative voltages on the gate of jfet.
Also jfet should be AC coupled to the rest of the circuit (putting capacitor between the drain of jfet and mid point of two resistor). This keeps JFET in Ohmic region, since then the DC bias on the drain will be always zero.
If you want to do both putting resistor in the source and AC couple the jfet you need to bias jfet with a current source and bias the jfet in ohmic region.
Distortion analyzers have been around for a long time, the Hewlett Packard 334A was classic but there were others. the Keithley uses FFT inside but the older ones probably used a bridge.
I was going to say the same thing about the importance of keeping the JFET in its ohmic region if you want to avoid distortion. The 1V pp input signal is really too high for this application, especially where Vp is only about -2V which means the FET will pinch-off and leave the ohmic region at that sort of voltage from drain to source as well. It's compounded, of course by not allowing the signal to swing both positive and negative at the drain. An FET in its ohmic region is effectively non-polarised for small signals, so by working with, say, 200mVpp ac-coupled, the FET would only see 100mV each way and that would reduce the distortion by an order of magnitude or more.
@@RexxSchneider You are right usually they put AGC at early stages so that signal level is low. Here is a circuit for large signal Automatic audio leveling circuit:
ruclips.net/video/1h0FZJYXQ_w/видео.html
You know the best way to learn is from mistakes, and one of the things I like about IMSAI Guy's videos is that he makes lots it for us, I think on purpose, to draw attention to detail of circuit.
I always drool over your lab kit...especially when you break out the keysights.
If I recall correctly the jfet is more of a programmable current sink than a variable resistor.
Oh so very interesting. Thank you.
Merci. I love this video.
Really cool! Perhaps one way to reduce distortion would be to attenuate the signal prior to this voltage-controlled stage and then reamplify it by the same amount following this stage. That may add a little extra noise, but it may be worth it depending on application.
Perhaps a better idea is to attenuate only the low frequencies. Above about 2KHz, amplitudes tend to be decreasing anyway. This way you are less likely to make a hiss.
Youre Videos educational valuable.
To maintain a decent linearity you have to keep the signal as low as possible. With 1V peak you are really pushing the jFet. Do the same with 0.1V peak to peak. Of course you'll have to amplify with a second stage and this is not ideal for noise.
Another problem is that it's highly recommend to keep the signal>0 like you did. It will work with small negative excursions but the distortion will come back very fast.
Using resistors, H&H greatly improved the voltage controlled resistance of FETs.
The FET is the reason why a transistor is named transistor, because Transistor is the short form of tranformeble resistor.
John Pierce named the transistor from combining “Transconductance” and “Variable Resistor”. His proposal along with others were submitted for a vote inside the lab to officially name the device, and “transistor” was the overwhelming winner.
On a side note related to the video, Pierce was quite involved in computer generated music. He used to host parties at his home while he was a professor at Stanford, and it was quite an honor to be invited. Music was often in the spotlight. He died about 20 years ago. He had quite the mind.
@@kenchilton Thank you for correcting my misrepresentation of the name Transistor, thank you.
couldn't you make an extremely simple AM transmitter with this? audio goes on the gate, carrier signal goes on the resistor, the magnitude of the carrier will change with the audio signal, hence amplitude modulation
How do we maintain low THD at high amplification in this circuit?
The amount of distortion depends on the signal level. You would get less distortion if you decreased the signal level.
You are missing a key benefit of JFETs in your circuit. JFETs have a very high input impedance. You are feeding it with 50 ohms. You want to impedance match this, which will give you a huge increase in amplification and decrease in noise (reducing the SNR by adding passive gain in front of the FET).
For instance, a simple way is to use an impedance transformer that takes the 50 ohms input signal to about 1M ohm (which is the input impedance for many JFETs), which is a step up in voltage, allowing for huge gain (depending on transformer losses at the frequencies of interest). Of course, to deal with distortion, a transformer might not be the ideal solution all alone since the impedance match is complex (meaning that it involves capacitances and inductances, not that it is hard).
Usually, JFETs come into circuits because they are lower noise than MOSFETs or other types of transistors. This is why you find them in microphone preamps or RF preselectors. A future video might try to show that advantage, which is more interesting than just gain.
wow, you really missed the idea of this circuit, since you are interested:
JFET amp: ruclips.net/video/rJb1eVR30dY/видео.html
Microphone amp: ruclips.net/video/8IS7rScFL2U/видео.html
@@IMSAIGuy I guess the title of the video threw me off… I get that this is in your synthesizer thread of thought, and you cover that well, but I was just making suggestions. I like the nostalgia of it all, but there is also a lot that is still relevant and useful about all of these old parts and circuits.
I had this same idea a couple of days ago, except I wanted to use the FET as a voltage controlled resistor in the feedback loop of an op amp to control the gain. It seemed like a reasonable idea to me, but I couldn’t get my circuit to work properly; it kept breaking into oscillation, really just didn’t work at all. Maybe I wasn’t biasing the FET correctly? Not sure what I was doing wrong, any suggestions?
There are a couple of considerations for using an FET as a voltage-controlled resistor (i.e. in its ohmic region):
(1) The voltage between drain and source has to be kept low, significantly less than a volt, preferably more like 100mV or so. If not, the FET will become an amplifier (in its triode region) and will amplify any signals it picks up between gate and source. That may result in oscillations, depending on layout, etc.
(2) The voltage at the source has to be kept steady with respect to the gate, otherwise variations in the voltage at source are effectively modulating the gate-source voltage, and will manifest as a signal to be amplified, with a similar potential to cause oscillations.
You didn't say whether you were using a non-inverting or an inverting amplifier, but you can see that using the FET as the feedback resistor of an opamp will cause problems if the output exceeds a few hundred millivolts. You might get away with using an FET as the lower leg of the feedback divider in a non-inverting amplifier (source connected to ground), but you'll then be limited to an input signal of a few hundred millivolts, and the gain then depends on the reciprocal of the FET resistance, which isn't so bad as it's non-linear anyway.
try this: www.onsemi.com/pub/collateral/an-6603.pdf
@@RexxSchneider all of this makes sense. I was using an MPF102 JFET because it was what I had on hand. I knew that the gate had to be reverse biased with respect to the source, but I didn’t know exactly how to do that. I biased it with a trim pot between + and - 5V rails; set to about -1V on the wiper (gate). Negative feedback in the op amp, with source on negative input and drain on output. Positive input grounded, I think I was using a 10k resistor to negative input. I might play around with this some more; thanks for your suggestions.
Yes, of course! Tying the source directly to ground should keep the FET well behaved, plus it will make it easier to control the gate bias. Great, I’ll try it, thanks!
How does a Gilbert cell multiplier like the MC1496 perform in that application?
an up coming video will cover multipliers
I don't get it, why would a near pure resistive (I assume) be so non-linear with voltage? I use 99% mosfets, so I think I need to hjt the data sheets on JFETs! :)
Maybe you might try it with a 2N7000 mosfet?
What is the justification for using a JFET? Could the same effect not be achieved by using a simple trimmable resistor? Thanks.
Think about how he is intending to control it, that is with voltage, not manually. That opens up the possibilities for what it might be used for.
IMSAI guy just explained the reason in the last part of the video
If even JFET introduces so much distortion what is HiFi AGC are made from? 😕
That JFET is a bit pricey on Mouser. The J311 is a lot cheaper. (I know you are working out of your "junk bin" which is pretty impressive I must say).
Shouldn't the circuit be described as a "voltage controlled attennuator" and not an "amplifier"? The JFET isn't actually used as an amplifier in this case.
you mean like I say in the description? 😎