I suppose e-cores being named efficient could be in reference to their good space-performance, which in many ways seems to be the limiting factor of some computing these days, everything getting smaller but we're reaching the smallest you can go
@@NTLMBigBench well they are smaller than p cores so who knows they could be overclocked atom cores for all we know as an atom core likely cannot go very high, they only boost so far on a watt or two so if you fed them more power, they could go a bit higher but then they wouldn't be very efficient anymore🤣
I wonder if amd next time adds a few "E" cores to the io die. The biggest problem would be getting the os schedulers working correctly. Apple got it right because they own the entire platform, but when you have a highly diverse ecosystem it can be a challenge to integrate the properly.
Intel and AMD both need to work closely with MS on the Win11 scheduler for the next update to come out prior to their CPU releases. AMD messed this up quite a bit with fTPM bugs and scheduler issues last fall with the launch of Win11. All 3 companies would need to work closely and do a better job with this.
BIG/little has been a thing on mobile SOCs for years. The Apple M1/M2 have the same design since they are based on the A series chips in iPhones, just scaled up.
They will. There has been strong indications that Ryzen 8000 next year will come with 16 Zen 5 cores and 16 Zen 4C cores (Zen 4C is a special variant of Zen 4 meant for specialized servers).
@@JFinns yeah, I remember similar issues with Intel, with windows not knowing how to use the E cores well. Makes me wonder if microsoft is the one not wanting to cooperate more closely if both companies are having the same issues
I consider e cores to be "economy" cores instead of efficient cores. It's worth mentioning, technically efficiency isn't always about power but sometimes packaging and space constraints on the die.
@@ariesleo7396 Sierra Forest is a codename for Intel's first generation only E-core based Xeon server processors. It is fabricated using Intel's Intel 3 process. Sierra Forest will be used as part of the Birch Stream server platform in 2024.
What's interesting, and that I don't think a lot of people realize, is just how similar the P and E cores really are despite the massive difference in die size. The E cores aren't massively stripped down like the little cores in big.little architectures, they are more like P cores with a few of the numbers tweaked lower and some minor architecture differences. 5-wide instruction issue instead of 6, smaller reorder queues, smaller branch predictor history, 256-bit SIMD instructions double-issued to 128-bit units (like in Zen 1), different cache size/hierarchy, etc. but otherwise basically the same performance class of CPU. The architecture of the E cores of today is competitive with Intel cores from just 5 years ago, and because of die shrink, they're performance-competitive with cores that are even more recent than that. And the performance numbers bear that out, with the P cores being ~1.5x as fast as the E cores, despite being ~4x the size (and using almost 4x the power). It really goes to show just how much you have to increase die area these days to make any gains in single-core performance. Of course Intel is kind of hobbling itself there by including AVX512 in the Golden Cove die and then disabling it, but still.
The problem here actually is that the P cores are stripped down to match the E cores in actuality. No AVX512, no AMX even though they are present in the Golden Cove P cores themselves but fused off. The same Golden Cove P-cores used in Sapphire Rapids however, which has no Gracemont E-cores will have all of these features from the P cores that were disabled for the client chips. Ultimately this is an issue with the fact that Intel I guess hasn't figured out how to correctly and efficiently schedule tasks when you have cores with different instruction sets.
@@notnullnotvoid Intel has an "Intel Moment" every time they implement a new extension to the FPU/Vector Unit. But the removal of AVX512 is the most anti-intel moment that i have seen. They give us the ability to do SIMD on twice the data as before, giving us the power of an Intel Phi, and then they just remove it. I can't remember another time Intel has removed a FPU/VU extension. What a shame too because AVX512 would have great for ML. Basically not enough SW support for AVX512 so Intel axed it.
@@DorperSystems At least AMD has a double pumped (2*256) version of AVX-512 for users. I hear EPYC users are enjoying this feature for machine learning and other sorts of acceleration.
the moar cores meme existed on reddit for quite some time back when AMD still only had bulldozer. It hit a resurgence around the time Intel started increase core count to fight ryzen too.
The current rumors going around the mill are that Zen 5 might use the "cloud optimized" Zen 4c cores as little cores, and that Meteor Lake desktop chips are actually just going to be their high end mobile chips because the generations after Meteor Lake are gonna be the bigger splash
Thank you for that video, we have them for over a year now and there is not that much talk about how usefull they really are in comparison to "normal" core
That's because they didn't really have that much value until the 13th series which only came about a while ago. And all the scheduler issues and optimizations to get them working the best they could is still something MS and other companies are dealing with.
It would be interesting to see AMD using a "P core" chiplet along with a "E core" chiplet, if it actually proves to be worth it. They do have the Zen4c cores meant for servers, which have IIRC double the cores of normal Zen4 chiplet, with slower clocks and less cache but same IPC roughly.
It's definitely not double, but we don't know if the chiplets are the same size or how many there are. Epyc Genoa (regular Zen 4) has 96 cores between 12 chiplets, and they already announced the Bergamot (Zen 4C) version is 128. 128 cores can't go into 12 chiplets evenly - I'd guess it's 16 smaller 8 core chiplets, but 8 big 16 core chiplets is certainly also possible.
Or they can simply add E cores in the I/O die, it will not take that much space since the cores are small and core latency will be better compared to normal cores(because normal cores are connected to I/O die via infinity fabric).
@@sammoore2242 the early leaks do say Zen4c is 16 cores per chiplet, which is double what Zen4 is at 8. I do remember seeing a more recent leak but for the life of me I cant remember where or what did it say about them. Whatever the actual core count is, Zen4c exists to be denser with smaller cache and/or cores then Zen4. I think the later leak did say Zen4c had slightly smaller chiplets, but they were either longer or wider. But without me remembering where I saw it it isn't much use. Might have been on Moore's law is dead.
@@shepardpolska Either way it's only up to 128 per socket and it's not different outside of cache - no missing avx or whatever. Source - what amd have actually said about it so far, not rumour sites. I should go back and see if they said anything more in the Genoa launch presentation.
@@bingchilling177 they could, but for now there is a higher chance of the Zen4c chiplets being used. It lets them sell defective server chiplets with reduced core counts in 1 CCD Ryzen CPUs where AMD struggles the most against intel multithreading, and while E cores in the IO need a new IO die, Zen4c is basicly ready ti implement if the IO is compatible with them.
I would love to have a few! (6-8P 2-4E) cores just for browsing and stuff while the P cores are completly turned off until they are needed. Plus a GPU that can turn completly off and the system is powerred by the iGPU Imagine a pc that draws laptop like power when browsing / watching a movie and when you need the power all parts are awaked. Would be a blessing for a energy saving nerd like me.
What is the energy saving for, though? I am genuinely interested if you are just brainwashed by evil leftist narrative or if you have your own thoughts.
In 2023 with i5 14600K i am at 4W idle power draw and about 5 to 20 W general tasks (browsing, editing texts in word...) power draw. And i'm not even undervolted ! CPU have become really efficient.
The issue is that software has to differentiate between these cores, and it’s not always easy to do so and there are a lot of bugs where you program will end up using the e-cores instead of p-cores
I've run into this issue with Win 10 when you had applications that don't need much compute power and few threads. The threads were jumping all over the place, switching from P to E and back wasting energy for nothing. After manually setting which cores to use the issues went away and the hybrid design just works. Never had issues with compute demanding titles - games and applications chose the correct threads accordingly without manual intervention.
@@Innosos That's logical though, there's a reason Intel advocates 12th/13th gen users "upgrade" to W11 (which has a more appropriate task scheduler for hybrid processors).
This is my issue as well. From benchmarks, it seems fine BUT, I have yet seen an in depth benchmarking or even a compatibility check with virtualisation (KVM). Either they are hidden in the depths of reddit somewhere for my eyes to see or not enough people aren't buying top end CPU for virtualisation on linux (which makes me sad) Would love to go intel but I have no clue how the e-cores gets affected by KVM.
@@MLWJ1993 True, it is. But choosing between a couple of extra Watts while browsing or having to deal with random Win 11 updates breaking Ethernet drivers (had this happen yesterday on my media PC) I'll stick with Win 10 until Win 11 is as functional and proven as can be.
@@Innosos It's always interesting reading about these issues. I've personally yet to encounter anything glaring, only thing I had happen was my wireless adapter installing an outdated driver that made my PC bluescreen during large downloads, which hasn't happened again after reinstalling the driver.
I’ve got a passively cooled system where every watt counts, since it’s the biggest constraint. After extensive testing, I found the most efficient configuration is 8P/0E on a 12700F. Like you said, the P-cores are actually more power efficient, but also not having to deal with the E-cores the CPU can run at even lower voltages while still heating the peak speeds of the P-cores.
@@2kliksphilip True, I’ve seen people ramble on for 30mins talking about it. I also couldn’t decide whether to condense it all within 10ish mins or let my thoughts out for a longer vid.. in the end I guess it’s all about being yourself but tho kinda hard since I’ve never had my actual voice on the internet, haha
Seems like OEMs swapping market segments to be. AMD seems positioned to capture the gaming market provides the emphasis on single threaded and rasterized performance across the lineups. Meanwhile Intel seems to be building up their competence in async multi core compute, a segment previously dominated by AMD. Different markets if you ask me, and both companies are still making some crazy gains in the department or server architecture, with the highest RAM throughput we’ve ever seen by a long stretch.
I'm still into this, because I want fast cores for gaming and immediate recording in OBS, but I also have encoding tasks that take forever to do that would benefit from having more slow cores that are energy efficient from running at reasonable clock speeds.
The nice thing here is that the e cores are totally capable of recording very high quality in OBS. Though this is assuming that people learn about CRF rate control on x264, or how to do proper dynamic bitrate with NVENC (CQ-VBR).
@@BottomOfTheDumpsterFire on pcore yes, ecore no. On full ecore load it will bog down your pcore due to both used the same ringbus. Meaning running on your igpu will cause less slow down and you can still do both job at the same time.
0:39 thank you for bringing up the inter-core latency. It's still an issue that I deal with on my 3950X. I love this chip, but in real world gaming, it feels like Intel just works without fiddling based on the other systems I built and tested for people I know. It was even more clear that it was an issue due to "legacy" or "game" mode in Ryzen Master that would disable a CCD, and how they moved to an 8-core CCX in Zen 3. Also, while I am kind of eyeing thread ripper for a workstation build, I would love to experience the thread scheduler on Windows 11 for the 12/13th gen Intel chips, being someone that uses Process Lasso for my 3950X daily.
E-cores will be nice for laptop/embedded SoCs, potentially even with just E-cores to replace Atoms and the worst Celerons. But in desktops I have to wonder if 4 E-cores really handle background processes better than a 2-thread P-core. Add that it limits the amount of intensive programs or virtualization that can be done at once, and it seems like a just a way to get around ringbus limitations that make 16+ fast cores impossible until they start gluing together chips.
you need to look at jim keller. he designed zen which is amd roadmap to big little. he then went to intel and did the same. intel have the clout to make the switch sooner but also had more need being unable to get past 10nm and reduce size/power reqs.
@@2kliksphilip not sleeping on that fact dude, i know you did but that is only part of his story in this. i mean if you went down the jim keller rabbit hole you would see he is the daddy of modern cpu across the board. i mentioned it as that is the fact you seemed to miss, or maybe glossed over? none the less the video is a good watch and an interesting take on the current state or modern cpu. do you have any plans to get a new amd setup to talk about and compare your experience with too?
if you look at AMD's recent sever chip talk, they announced a CPU family called Bergamo, Which I think uses a similar approach to intels e cores, The max core count of the CPU goes from 98 to 128. Hopefully that technology might filter down to the next generation of user CPU's
I wouldn't call it about the same: the Zen 4C cores are nearly the same as the regular Zen4 cores. They just trade a lot of the die space used for cache on more cores.
@@BWTHeuSeD There have already been a bunch of hints that the next generation of Ryzen chips, 8000, will come with 16 Zen 5 cores and additionally a die of 16 Zen 4C cores.
if its in development right now, we wont see it for easily 3 or 4 generations. like Philip said in the video, it can take around 5 years for a CPU to go from design to on the shelves.
@@X4Alpha4X "if its in development right now" It isn't. Companies don't announce products when they start development, they do it once they've finalised the design and are nearly ready to launch it. Bergamo is coming out in 2023.
Hi Philip, this comment is completely unrelated to the video, but a video suggestion. I'd be interested in a video which shows all (or some handpicked) geforce driver fps comparison. Like a plotted graph of these values or something like that, I am sure you would be able to visualize the results perfectly. I don't know if it is even possible, but starting with version 1 up to version 526, which is the current at the time of this comment. I think this would be a very interesting video. Since this is my first comment on one of your videos (at least I don't remember ever commenting), here my obligatory complement: I am watching your videos (all kliksphilips) since I can't even remember when. This is one of the greatest quality content on youtube in my opinion. I'm glad you are still active!
the problem with the E/P setup is that it has diminishing return on the high end, 7900x/7950x and 13700k/ 13900k are nearly parity single and multi. its good for entry stuff, but chiplets are just flatout more scalable. a 3rd chiplet die is a lot more practical i feel.
A Zen 4 core is about half the size of a Golden/Raptor Cove (P) core. A Gracemont (E) core is about half the size of a Zen 4 core. A P core roughly matches 1 Zen 4 core in performance. The 13900K fits 16 E cores in 50% the area of 8 P cores. If this was 8 P cores instead (for 16P cores total), overall performance would be similar, but the total area taken up by the CPU's cores would be 33% larger, and power usage would likely also be higher.
My only wish is a day where there is a proper 4-4-4, or 4-2-4 layout chip for the average user. 4 honking P-Cores that will annihilate everything before, like we're seeing even today. 4/2 "M" Cores that are just there to boost the core number and give some performance back to the user. 4 hyper-efficient, true "E" Cores which can clock down to
@@mtunayucer Yes, and also Intel's current architecture, just better executed. ARM's DynamIQ architecture was just a bandaid response to dwindling single core, nothing else, with one core now dedicated to buffing that up. Here I'm wishing for just a very well balanced CPU with real advantages
These core setups are basically like the option in windows that allows you to physically assign certain cores to do certain things for possible efficiency, but better. Using that feature in windows sometimes made background apps perform badly, even if you gave one program two cores, it was bad. Now with these E cores, all of your background stuff is basically being forced on those cores, but won’t cause those apps to perform bad. Though I still feel like the efficiency of the P and E core setup needs work. Like when the P cores have nothing to do, have them clock down enough to use almost no power, while the E cores basically sip power to keep background stuff and the PC on lol.
They are efficient - put them against the P cores at the same speed and run them at 100% and they consume WAY less power - but will even be just as good in many, but not all, tasks. Really, most of everything you do on the computer should be running on the E's with the P's reserved for the power-needing stuff (games, compiling, etc.). You know - like phones - where Intel got the idea.
CPU microarchitectures generally begin their development cycles 2-3 years before rollout. A great example is AMD; Lisa Su joined the company two and a half years before Zen 1 came out, and she's generally said to have started the project during her tenure as CEO from my understanding. That's all to say, it's very, very unlikely that the 13th gen is the first one to be made with Ryzen in mind. It would be much more likely to be the 12th or, more likely, 11th gen. It's technically possible the 10th gen was made with Zen in mind, but on the desktop side there were remarkably few generational improvements in that release so I doubt it.
Computer scientist here. You're pretty much on point. The idea behind e-cores is that many computations usually don't need the kind of power (which usually also means HEAT generation) that p-cores aim for. The problem with having only p-cores is that you'll generate more heat (meaning more thermal throttle) and saturate more of your cache, not to mention performing more of what we call "context switching", which is when a process changes from, say, core 0 to core 5 because the region around core 0 was getting too hot. This is especially costly, because you have to move all of the workload in the pipeline from one core to the other and that is hella taxing on performance, but unfortunately we're limited by the technology of our time and this is the only way that we are able to do this. Having P and E cores solves or at least minimizes most of these issues, though. Also, like you said, the idea behind using lower-power cores most of the time and only using high-power ones when needed is relatively old, and phones have been using it for a while now (especially the ones with snapdragon SOCs). Intel just brought these ideas to the x86 CPUs, and the results speak for themselves. Personally, as someone with some experience in this area, I think we'll see a shift to Intel's strategy in the long term. The P and E core architecture is kinda like the "new kid in the block" and much of this type of technology is not really explored yet. Exciting times ahead!
I think they will eventually follow the original script of ARM cluster sooner or later. Windows wants to stay in SMP as long as possible. This is basically the chiplet design Intel is avoiding. The bit.LITTLE was originally created for the operating system to dynamically scale power quickly. It was never a performance design. Mobile needed an answer quick and needed something which scaled in the future. ARM choose SMT over SMP. (Redesigning the core was and still is pointless.) The idea being cores can come offline dynamically. This was SMP so user management only. Programmer was to be hands off. I look for the PCIe chiplet design to eventually win. PCIe interconnects are actually more powerful than people realize. This is hidden in the north bridge, but it started the i series. They knew this from the start. Truth is they have all slowed way down. Intel is actually trying to catch up and AMD is hanging on for dear life. NVidia actually owns a lot more than people realize. They wanted ARM for a reason, but I am not sure if they still do or not. The real problem they are in is performance per die space. With e cores they throw away die space. With p cores they need better programmers. They are screwed.
It's very difficult to make tiny cores power efficient for a number of quite technical reasons (specialized instructions, trace length , memory overhead/delay). I really look forward to seeing how intel combines chiplets with e-cores however as it absolutely allows for the possibility of larger e-core dies.
@@animatrix1851 The current E-cores in Alder and Raptor lake are full X86 64-bit cores, just small and lacking multi-threading. I think the end goal would be a specialized architecture that is purpose built for the common use cases of E-cores is the best bet.
I'm getting HUGE stuttering in Metro Exodus Enhanced Edition with E-cores enabled on my 12600K/RTX 3080 rig. Disabled them in BIOS and my gameplay experience is extremely smooth now. Those E-cores may be the problem sometimes.
The problem there seems to be the thread director that is still not mature enough to properly assign loads (which is stupid given that we are already on the second generation of hybrid cpus). Have you tried assigning affinity to your game instead of disabling e-cores? Might be a better way of handling the issue without effectively throwing away the cores you already paid for.
@@ipodtouchiscoollol That's true however it resets every time you launch the program. Process Lasso can be set to run continuously. You could make a shortcut to append the specific cores to run on as an option at lauch of the program, but I don't want shortcuts on my Desktop.
Intel started the race against Ryzen with higher clocked cores and bigger transistor size. They recently started switching some of those with something called "E" cores to up the multi-core performance and scalability. Now it seems they are planning to slowly get rid of the higher clocked "P" cores in favor of more "E" cores that are generally lower clocked. AMD in the meanwhile started the race with Ryzen's scalable chiplet design and has been upping the core clocks as they go. At one point in the future, AMD will probably have higher clocked cores and the prospect of just including more chiplets for even more scalability. Since AMDs cores are all close to each other in performance, I'd say this gives AMD an edge on the long run. (More chiplets, more cores, higher clocks). We can take a look at EPYC processors to see the heights AMDs consumer designs could potentially reach over time. AMD doesn't need to copy this E-P core design, it is Intel's attempt at shifting strategy to match AMDs design in the long run. This feels like Intel's transition period to a more ryzen-like design. I bet they had this design sitting in an R&D branch for decades and they only really started pursuing it after Ryzen became a threat. I think Intel is still playing catch-up for the long run, I feel like these back-forth in the last couple generations is not a big indicator that Intel is definitively back on top, yet. Lets hope the kinks in ARM are ironed out by then and it replaces x86 so we can finally have actual efficiency with high performance and even more competition in the market. It's kind of a waste to be throwing 200W at a processor.
They're pretty power efficient too, if you run them at the 2-3GHz they were originally designed for, instead of massively overclocking them by default like Intel did.
They're only as relevant as they are because intel doesn't have a nice solution to automatic undervolting the way ryzen cpus have. E cores dont solve the problem that you think they do.
ARM's big.LITTLE architecture was designed with power efficiency in mind, to put simply only one big or LITTLE core in a pair would be powered on depends on the task running on the core, and it can switch between the two on-the-fly. (Later design do allow all big and LITTLE cores to run at the same time for maximum performance, in which case efficiency is out of the window.) intel's P-cores and E-cores aren't designed in pairs and can't do the same.
I don't, know why but it always love to hear you say the phrase "a hell of a lot of" but it always gets condensed into "hullolotta" or something else indecipherable. like at 4:26
I don't think you touched on the big benefit; CPUs are advertised by core count. Even if the E cores couldn't keep up with AMD in multithreaded workloads; intel can throw "we have 24 cores and they *only* have 16" at consumers for the 13900K and 7950X.
As someone who doesn't do rendering or other all-core workloads, I hope AMD doesn't do the hybrid design like Intel. I like knowing that I don't have to care what process is getting assigned to which core by the scheduler. This is still wreaking havok on all sorts of applications, years later.
AMD will certainly add big little to its roster as well. In the server world they have shown their new Genoa architecture, which have a Bergamo subtype for cloud computing, that is basically a whole CPU with just E cores, but many more of them. Given that therefore the basic core design is there, and ARM & Intel have done the groundwork on OS & app support for it in their respective markets, I would be more surprised if we didn't see it, especially since AMD could just make an E core chiplet and flexibly combine it with one or more P core chiplets depending on the target market. Especially for mobile, server & embedded this will become more important, especially since x86 also has to fight against ARM more and more in these fields. ARM Windows may yet be small, but there is Apple, who have increased their marketshare since their ARM transistion, in servers ARM is a lot more present, and in embedded it is already king.
At least Zen4C cores are supposed to take half the space of the regular Zen4 cores and be only 10% slower. So, we could get some 16 core chips that are a bit slower single thread but good for competition with Intel's 8P 16E models.
I think the situation is very simmilar to the bulldozer times - lots of cores and high power consumption. And that didn't go very well for AMD back then. And until the next gen consoles - it seems we are more or less limited to 8 cores. - And they better be the best 8 cores possible. - In laptop land - whoever can achieve the most in 15 - 45 watt will be the leader
Have a thinkpad with amd 6850U runs 51w in performance mode but slow it down to 3w idle and 12w max its around 90% as fast daily use, battery lasts 18hrs
The difference is that the bulldozer line was a huge lie in many areas, including its "cores" which were actually core-pairs capped to FPU modules. So if you had an "8 core" FX8350, what you really had was a 4 core processor with ironically worse performance than the standard core in other architectures at the time.
@@hannahtimson2526 I have a very similar 6980HS. 4W idle, 25W max on battery, but I can unlock a 75W power limit when docked, and it can take more from the GPU if needed. Smart shift has been a brilliant system so far and I hope something similar is adopted for desktops in the future. My SFF PC could have something like it.
Imagine if you replace all but two p-cores in the 13900k with e-cores. That would be one hell of a web server CPU. Two p-cores for internal processing, each e-core for a group of clients.
Intel's strategy makes sense because optimizing games to use more and more cores appears to be a rather difficult task, so having less powerful cores allows those cores to run a little faster due to having both slightly more energy and available and not getting as hot due to less powerful cores running under the same IHS, and on the other hand software that is highly threaded cares more about the amount of cores than in their speed. A possible problem of this approach is encountering errors or simply seeing less performance due to the OS or the software itself not being able to efficiently distribute their workload among the P cores and the E cores.
I feel like there could be some catches using P+E design since benchmark programs either stress 1 core or all cores. What if a software uses all available P core threads + 1 more? Let's say there's a task that uses 7 threads, 6 threads are run on P core, one thread is run on an e-core, would that one extra e-core performance delay the task completion since P core threads complete their tasks first but have to wait until e-core finishes its task? Or would the task being done by e-core move over to P core whenever P core becomes available hence overall performance is less impacted? I remember reading a forum at intel web some users have reported weird performance drop when mixing these thread allocation by fiddling affinity settings.
Generally no, the E-core wouldn't hold up the program in this situation, because scalable multi-threaded programs (likely almost anything that would scale to 4+ cores in the first place) don't typically allocate a large chunk of work to each core upfront - instead they break the work into a larger number of smaller tasks in a queue, and a pool of worker threads grab tasks from the queue. Each thread grabs its next task as soon as it finishes the previous one, until the queue is empty. So if one core is slower than the others, it ends up grabbing fewer tasks, and finishes its last task around the same time as the others. The OS scheduler could also move a thread from the E-core to the P-core, just like you said, but it's not really guaranteed, and it would only partly mitigate the problem. What's more likely is that a heavily multi-threaded application will be written to avoid relying on the behavior of the OS scheduler as much as possible.
Big-Little multi chip designs are probably going to be a persistent normal thing for decades. The two technologies seem made for each other. While Big-Little really struggles in the frame of energy efficiency on desktop in large part because of the inherently inefficient infrastructure that desktop CPUs are built on, I suspect that it will become better. Who knows, maybe they will find a way to actually implement a sort of RISC concept to E cores in 10 or 20 years. and in terms of multi chip designs, I suspect that those will become universal. The benefits are proven and the scalability makes it essentially a no-brainer in the long term. The potential downsides will primarily only manifest when infinity fabric latency isn't fast enough to keep up with single die designs but with designs such as having a single P die and 2 E dies, they could avoid the brunt of that problem by keeping latency at a minimum when it's most important.
What I am hoping to see with E-Cores is simply them handling more of the background processes so that the P-Cores could focus on my activities without any sudden interruption or slowdown. This could be achieved by better core management in the OS instead of hardware but at this point, from what I have seen, isn't likely to happen.
I am REALLY stoked for Zen 5. Why? Because they‘re apparently going to do the same thing with Zen 5! The Kicker: Zen4 will be the „E“-Core! It would make sense with their chiplet design. Putting Zen 4 and 5 CCDs on one package would make that fairly easy i‘d say. On top of that, we have Zen4c, which stands for compact, which is designed for more cores on the same die-space, at the cost of cache, but these e-cores aren’t meant to be the performance monsters anyway. On top of that Zen 4 would then be a tested design. ADDITIONALLY AMD could manufacture these with an older node, to safe on costs. That this is doable is shown with RDNA3. Th GCD is 5nm, while the MCDs are in 6nm and the I/O does for zen also share this approach. They also said, that Zen 5 is in for a huge performance jump. It would really add up!
Just multiprocessing applications to effectively and efficiently leverage multiple cores is a complex problem that varies with : programming language implementation and limitations (each one threats multicore execution differently), computing problem needs (not all computing issues multiprocess in a simple manner), computing loads (some loads are sustained while others ar bursty in nature) bottlenecks (IO bound loads vs calculation bound loads) Expecting the usesrpace software to handle core type allocation is just another thing to the already complex mix of stuff...
I would like to see a 8 or 16-thread variation of ADL-N coming to the market, and this would be enough for ~90% of PC users. However Intel being Intel they won't sell this cheap.
Ryzen appeared while Intel was stuck and unable to progress in their process nodes. They had the microarchitecture designs, just not a way to manufacture them. They still haven't fully recovered from that, and don't expect to catch/pass TSMC for a couple years or so.
One day when I upgrade from the Zen 3, I will have to build a whole new computer (besides the case). And until then, it's exciting how Intel and AMD are actually competing in my mind. Whoever I choose next is absolutely going to be the one with the best POWER EFFICIENCY, as a space-heater PC sucks when you live in a sub-tropical climate like I do, plus electricity isn't free. Even my current 350W PC makes the room uncomfortably hot when running full tilt.
Ironically, you can take advantage of that efficiency even today. You can buy a higher end chip and slightly under-clock/under-volt it, or buy a lower end chip and do the same. Many programs today don't really need that top-tier performance, even games. And they run so well that you likely won't see much of a difference by dropping it down a bit. For example, by turning off SMT on my 3950X (since I rarely do anything that maxes out all the cores), I brought the peak TDP down from 160W+ to < 100W. It even idles around 15-25W instead of the usual 25-40W. You could even grab a 5600X and under volt it a bit, where its rated TDP is still only 65W despite being a 6-core chip (compared to the old HEDT Intel chips that took 100W+).
The core architecture is often years in the work, but even there, changes are being made till the last moment. Scaling up core count however is massivly easier. I would be suprised if the direction Intel went wasn't dictated by Ryzen, even before Alderlake and the such.
the final of that big.little architecture will be when (if ever) windows works correctly on arm I think we wilm have p cores and arm cores for efficiency
Likely amd already has this in mind as they are absolutely dominating the performance per watt, as in it’s not even close by any measure. This can be seen in the server market. It takes several years to design and manufacture something like this, as you pointed out
You need to better informed. Most tech media outlets do a poor job and evaluating efficiency. Those who actually spend time and do it properly found that in real world use that would define more than 90% of consumers, intel just about edges AMD on efficiency.. why? When intel brought big little, most people didn't realize how low their CPUs can idle, under 3W for some desktop chips. On top that, their P cores are extremely responsive and offer peak performance very quickly at high power and ramp down to their crazy low idle power. This peak is like microseconds or milliseconds. So the chip on average consumes less energy when you monitor its use over long periods of time in common use cases. The media will focus on "it pulled 300W" on and edge case that doesn't describe 99% of users. AMD has serious issues with idle or low load power, and this is a fundamental disadvantage with chiplets.
Every competition is a GOOD competition. Remember in 2011, when AMD release "fail dozer", Intel based rig could cost 2x even 3 times as much as AMD rig. Nowadays, most Intel motherboard are cheaper than AMD motherboards.
what if they made two types of cpus, one focused on gaming, with say 8p4e and one focused with work 4p24e? since the E cores are much better per area for workloads
AMD just launched 96 core EPYC Genoa. Imagine if they took a page from intel and replaced all their 8 core chiplets with 2P/24E core chiplets. That would make a CPU with 24P/288E cores, 312 cores total. Insane.
@Captain_Morgan that's actually the reason why intel chose this approach. It allows the P core design team to go a bit crazy for single core performance while the e-core team can focus on multithreaded. AMD has to balance both, so its not a coincidence that their core size falls somewhere in between. If they adopt a similar strategy I would expect them to go a bit crazy too. Also remember that AMD Zen 4 is made on TSMC N5 HPC which is about 95MTR/sq mm, Raptor Lake is 60MTR/sq mm. It's quite impressive that intel still manages to come on top in single core all things considered
There is Zen4C, that said AMDs Zen 4 cores are more efficient than the Intel E-Cores and they have extensive clock-gating (Switching off unused parts temporarily) as well as very fast on-demand re-clocking. Furthermore TSMC has a higher yield in their manufacturing process than Intel + the yields are significantly increased by the smaller die area of the chiplets. As far as we know, Genoa (EPYC 9xx4) obliterates Ice-Lake (current gen Intel Server CPUs) in every metric we know. Sapphire Rapids probably won´t be competitive either, especially when looking at efficiency. AMD even managed to beat Intel very hard in AVX-512 workloads with their mostly double pumped 256 wide design (shuffle is true 512bit for some operations). They have higher efficiency, less chip area and more performance, as they don´t have to downclock. Intel can´t have AVX-512 with E-Cores as the E-Cores don´t support it, so it won´t be availiable on consumer Alder-Lake CPUs (Intel 13th gen). The AVX-512 area on the P-Cores is just dead silicon, which decreases the yield / increases manufacturing costs. Once more software makes use of these instructions (games, video encode, AI, Simulation) Zen 4s performance will increase even more in Benchmarks. AMD probably already has the "pads" on the 6nm IO Die in Place to simply add another Cache to the existing Zen4 designs, so 7600X3D will be released sooner or later i guess.
The recent leaks are interesting, but odd. Intel has released at least one chart that showed MTL as 8P+32E. It could be that 6P is enough to hold off Zen4 for the first half of '23, and also lower their power usage. If so, then maybe its not a bad idea. Power draw is the main complaint people have about current products.
I think 6 or 8 P cores are going to be good for a while for the vast majority of consumers, at least until games finally revise their thread situation and take some notes from the recent Doom games.
@@DarkSwordsman I don't even think that's very likely until we hit silicon's shrink limit. DOOMs job system is impressive, but as I understand it, it takes a lot of work to implement and is unique to each game, so you can't just "build it into the engine" so to speak. So as long as CPUs are getting faster single thread performance on a yearly basis still, there isn't much reason for most devs to put that much effort into it.
It isn't new info that meteor is going to be 6P. Consoles have 8 cores now so games will start to utilize more threads in the coming years. With a strong 6 core it will probably be fine though.
@@eniff2925 Consoles have 8 cores for the sake of longevity and have for 3 generations. Most games are still single thread limited though, and with the gains we are seeing, a new 4c PC CPU will match the consoles 8c in multithreaded performance by next generation. So that's not really a concern. But until a few days ago I had heard nothing of this, so I think there is still a chance this leaker is mistaking mobile SKUs for desktop.
@@eclipsegst9419 This is the first true 8 core console generation. Previous gen had double quad core cpus. If you look back the articles, there is mentions of this as far as the beginning of the year.
What concerns me about heterogeneous CPUs is that, in some applications like e.g. Ableton with many VST plugins, scheduling a cpu-heavy software instrument on an E-core is going to get messy. So the DAW (e.g. Ableton) needs to know what it can and cannot schedule on E-cores, know how to tell the OS about that; and also plugins that do multi-threaded processing also need to know how to avoid CPU-heavy tasks being scheduled on an E-core (and before the CPU/OS has any profiling information to tell it)
@@niter43 No problem, I just don't wanna pay for it. They usually charge more for processors with 16 threads as they are used mainly for professional applications
I'm more looking forward to AMD's 3D V-cache lineup versus intel's e cores in the low end. Then it'll REALLY be a 6 high speed cores vs a bunch of E cores fight.
and now Userbenchmark is going to change their ratings again to favor more cores, with "P" and "E" cores counting in one single benchmark. Basically, while AMD's Ryzen 9 5950x will going to be rated a "0" on the 64 core benchmark because that benchmark somehow "requires E cores" to operate, Intel's 13900k would be able to score some number in the 64 core test. Then they will say a processor without E cores are "trash" and "not really useful as Cinebench score determines how fast your CPU really is" and "not everyone plays games" etc etc.
1:20, that's only partially true, as both sides have some headroom with design changes. It takes ~3 years to take any big change to production, but small ones can happen. technically ryzen appeared when 7'th gen was in flight, so 8'th were first that could see any change. 8'th gen intels were probably fairly unaffected, but it's possible they trickled down that core increase instead, so named i3 what was supposed to be i5 previously, and pushed them 100 or 200 MHZ harder than previously planned, stuff like that. 9'th gen had non-silicon optimizations, like thinner IHS, which is a direct result of ZEN, they pushed that silicon harder than they planned, again so they needed stronger thermals. 10'th gen already should be designed from ground up with all they knew about 3'rd gen ryzen and new all about chipsets and their scalability. It was issues with 10 nm that stopped intel from responding properly. I believe they had issues with 10nm because zen was so strong that it was to weak, for issues it made & they restarted whole 10nm from ground up. 4:20 that's not really the case, its very situational. Because intel did not give us cores for last 15 years, 8 was absolute maximum, most game engines just dont assume you have more than 4/8 and focus on squeezing as much from 4/8 as they can. games have clear benefits of more cores (depening on a game) up to 8 cores, after that, you stop windows updates, antivirus, browser and all other backgrounds from taking cpu power from your game. Stuff like that don't really need to finish ASAP, so they can slowly finish in the E core. It also have a benefit of stopping windows update/telemetry from completing in 10 seconds, while taking max power from your ssd/cpu/network, so slower core by chance evens out spikes of windows background activity, making it feel much smoother.
AM6 could use 4 chiplets. I could see putting full cores (perhaps more than 8) in each of two chiplets and then have 2 chiplets with secondary cores, up to 32 each if they use the same 4-1 ratio Intel uses. or perhaps 1 chiplet for mini-cores and one for npu or gpu functionality. Though balancing heat and power distribution efficiently will likely be a challenge. I'd really like to see a 4 chiplet based hedt lineup as well. 32 cores and at least 64 pcie lanes from the gpu.
for Video Games, or particularly, People that don't do Rendering and such, these extra slow Cores don't really do us much good. but it does help the Products compete in those infinitely wide tasks. sooo at the end of the Day, while for me i'd prefer some more real Cores and zero slow Cores, if i can't have that, atleast what i can do is turn off the slow Cores and the on Die resources for them, can now be utilized by the real Cores. it's not what i want, but if i have to take it in order for Products to remain competitive in that Synthetic Marketing, then i guess there isn't an alternative. and i do still gain some benefit, just less benefit than otherwise. this mainly being when your CPU isn't sitting around and waiting. some more Threads are useful if all of your existing Threads are stuck waiting on the work they're already doing. but why anyone would Buy a fast CPU only to themselves configure it in a way that kneecaps it, is beyond me. if your real Cores are allowed to go fast enough that they aren't sitting around doing nothing, then extra slower Threads don't really do much for you. and yeah, CPU's always have long roadmaps. you have to schedule your Fabrication multiple Years in advance, as Fabs are freakin' busy so you gotta make Reservations early. no such thing as a rush job when you have so many different Customers. then the R&D time before that.... yeah, nobody is making Chips in a reactive way. not the way the Internet likes to pretend atleast. People also act like GPU's can be reactive when they're behind the same obstacles. ain't nobody making a new GPU design in a few Months after a competitor makes a release doing or not doing __. that's just not possible. let's round that out with that i'll mention the Silicon Bridges you're referring to with Intel - while it's atleast in part a reactive strategy, just like the rest about making Chips, it's expensive and very time consuming - they couldn't have just kneejerked it after seeing the competition go Chiplets. must have already been doing some research. more importantly, Silicon Bridges is the current best answer to compensating for the performance loss of going Chiplets. lets you make Tiles without having to space them apart and cross into Substrate, so it should let us have the best of both Worlds until Optical Circuits become viable for Manufacturing. cool stuff! and Intel was very smart to have Patented that. i'm sure AMD wishes they had thought of that first so they could Patent it instead.
I suppose e-cores being named efficient could be in reference to their good space-performance, which in many ways seems to be the limiting factor of some computing these days, everything getting smaller but we're reaching the smallest you can go
are e core atom cores?🤣🤣🤣
@@raven4k998 god no
@@raven4k998 thankfully no
@@raven4k998 You really had to ask that?
@@NTLMBigBench well they are smaller than p cores so who knows they could be overclocked atom cores for all we know as an atom core likely cannot go very high, they only boost so far on a watt or two so if you fed them more power, they could go a bit higher but then they wouldn't be very efficient anymore🤣
I wonder if amd next time adds a few "E" cores to the io die. The biggest problem would be getting the os schedulers working correctly. Apple got it right because they own the entire platform, but when you have a highly diverse ecosystem it can be a challenge to integrate the properly.
I mean, Windows 11 currently handles it *okay*. Leaves a bit to be desired, obvi
Intel and AMD both need to work closely with MS on the Win11 scheduler for the next update to come out prior to their CPU releases. AMD messed this up quite a bit with fTPM bugs and scheduler issues last fall with the launch of Win11. All 3 companies would need to work closely and do a better job with this.
BIG/little has been a thing on mobile SOCs for years. The Apple M1/M2 have the same design since they are based on the A series chips in iPhones, just scaled up.
They will. There has been strong indications that Ryzen 8000 next year will come with 16 Zen 5 cores and 16 Zen 4C cores (Zen 4C is a special variant of Zen 4 meant for specialized servers).
@@JFinns yeah, I remember similar issues with Intel, with windows not knowing how to use the E cores well. Makes me wonder if microsoft is the one not wanting to cooperate more closely if both companies are having the same issues
Talking about Intel rationally? That's not very userbenchmark of you
I consider e cores to be "economy" cores instead of efficient cores. It's worth mentioning, technically efficiency isn't always about power but sometimes packaging and space constraints on the die.
But why can’t you make a server processor that is only E-cores?
@@ariesleo7396 Intel Sierra Forest says hello
@@ariesleo7396 Sierra Forest is a codename for Intel's first generation only E-core based Xeon server processors. It is fabricated using Intel's Intel 3 process. Sierra Forest will be used as part of the Birch Stream server platform in 2024.
If E stands for economy, what does P stand for ? Pphhat ?
@@Antagon666 power(ful), performance, premium, take your pick
What's interesting, and that I don't think a lot of people realize, is just how similar the P and E cores really are despite the massive difference in die size. The E cores aren't massively stripped down like the little cores in big.little architectures, they are more like P cores with a few of the numbers tweaked lower and some minor architecture differences. 5-wide instruction issue instead of 6, smaller reorder queues, smaller branch predictor history, 256-bit SIMD instructions double-issued to 128-bit units (like in Zen 1), different cache size/hierarchy, etc. but otherwise basically the same performance class of CPU.
The architecture of the E cores of today is competitive with Intel cores from just 5 years ago, and because of die shrink, they're performance-competitive with cores that are even more recent than that. And the performance numbers bear that out, with the P cores being ~1.5x as fast as the E cores, despite being ~4x the size (and using almost 4x the power). It really goes to show just how much you have to increase die area these days to make any gains in single-core performance. Of course Intel is kind of hobbling itself there by including AVX512 in the Golden Cove die and then disabling it, but still.
The problem here actually is that the P cores are stripped down to match the E cores in actuality. No AVX512, no AMX even though they are present in the Golden Cove P cores themselves but fused off. The same Golden Cove P-cores used in Sapphire Rapids however, which has no Gracemont E-cores will have all of these features from the P cores that were disabled for the client chips.
Ultimately this is an issue with the fact that Intel I guess hasn't figured out how to correctly and efficiently schedule tasks when you have cores with different instruction sets.
a n i m e
n
i
m
e
@@davidbuddy It's nuts how badly Intel has mismanaged the implementation of AVX.
@@notnullnotvoid Intel has an "Intel Moment" every time they implement a new extension to the FPU/Vector Unit. But the removal of AVX512 is the most anti-intel moment that i have seen. They give us the ability to do SIMD on twice the data as before, giving us the power of an Intel Phi, and then they just remove it. I can't remember another time Intel has removed a FPU/VU extension. What a shame too because AVX512 would have great for ML. Basically not enough SW support for AVX512 so Intel axed it.
@@DorperSystems At least AMD has a double pumped (2*256) version of AVX-512 for users. I hear EPYC users are enjoying this feature for machine learning and other sorts of acceleration.
can't believe I'm finally seeing Phillip put old /g/ memes in his videos
moar coars
4chan user
@@Janus-yv8zm yes
tried finding how far back this meme goes. earliest I got was 2014. that's borderline retro at this point
the moar cores meme existed on reddit for quite some time back when AMD still only had bulldozer. It hit a resurgence around the time Intel started increase core count to fight ryzen too.
The current rumors going around the mill are that Zen 5 might use the "cloud optimized" Zen 4c cores as little cores, and that Meteor Lake desktop chips are actually just going to be their high end mobile chips because the generations after Meteor Lake are gonna be the bigger splash
I love catching the images you've silently upscaled
Thank you for that video, we have them for over a year now and there is not that much talk about how usefull they really are in comparison to "normal" core
e cores work fine at running windows so the p cores can run your game and nothing else🤣
That's because they didn't really have that much value until the 13th series which only came about a while ago. And all the scheduler issues and optimizations to get them working the best they could is still something MS and other companies are dealing with.
It would be interesting to see AMD using a "P core" chiplet along with a "E core" chiplet, if it actually proves to be worth it. They do have the Zen4c cores meant for servers, which have IIRC double the cores of normal Zen4 chiplet, with slower clocks and less cache but same IPC roughly.
It's definitely not double, but we don't know if the chiplets are the same size or how many there are. Epyc Genoa (regular Zen 4) has 96 cores between 12 chiplets, and they already announced the Bergamot (Zen 4C) version is 128. 128 cores can't go into 12 chiplets evenly - I'd guess it's 16 smaller 8 core chiplets, but 8 big 16 core chiplets is certainly also possible.
Or they can simply add E cores in the I/O die, it will not take that much space since the cores are small and core latency will be better compared to normal cores(because normal cores are connected to I/O die via infinity fabric).
@@sammoore2242 the early leaks do say Zen4c is 16 cores per chiplet, which is double what Zen4 is at 8. I do remember seeing a more recent leak but for the life of me I cant remember where or what did it say about them.
Whatever the actual core count is, Zen4c exists to be denser with smaller cache and/or cores then Zen4. I think the later leak did say Zen4c had slightly smaller chiplets, but they were either longer or wider.
But without me remembering where I saw it it isn't much use. Might have been on Moore's law is dead.
@@shepardpolska Either way it's only up to 128 per socket and it's not different outside of cache - no missing avx or whatever. Source - what amd have actually said about it so far, not rumour sites. I should go back and see if they said anything more in the Genoa launch presentation.
@@bingchilling177 they could, but for now there is a higher chance of the Zen4c chiplets being used. It lets them sell defective server chiplets with reduced core counts in 1 CCD Ryzen CPUs where AMD struggles the most against intel multithreading, and while E cores in the IO need a new IO die, Zen4c is basicly ready ti implement if the IO is compatible with them.
I would love to have a few! (6-8P 2-4E) cores just for browsing and stuff while the P cores are completly turned off until they are needed. Plus a GPU that can turn completly off and the system is powerred by the iGPU
Imagine a pc that draws laptop like power when browsing / watching a movie and when you need the power all parts are awaked. Would be a blessing for a energy saving nerd like me.
What is the energy saving for, though? I am genuinely interested if you are just brainwashed by evil leftist narrative or if you have your own thoughts.
You can kinda do that already with a discreet GPU. Just tweak the voltage curve.
In 2023 with i5 14600K i am at 4W idle power draw and about 5 to 20 W general tasks (browsing, editing texts in word...) power draw.
And i'm not even undervolted !
CPU have become really efficient.
The issue is that software has to differentiate between these cores, and it’s not always easy to do so and there are a lot of bugs where you program will end up using the e-cores instead of p-cores
I've run into this issue with Win 10 when you had applications that don't need much compute power and few threads. The threads were jumping all over the place, switching from P to E and back wasting energy for nothing. After manually setting which cores to use the issues went away and the hybrid design just works.
Never had issues with compute demanding titles - games and applications chose the correct threads accordingly without manual intervention.
@@Innosos That's logical though, there's a reason Intel advocates 12th/13th gen users "upgrade" to W11 (which has a more appropriate task scheduler for hybrid processors).
This is my issue as well. From benchmarks, it seems fine BUT, I have yet seen an in depth benchmarking or even a compatibility check with virtualisation (KVM).
Either they are hidden in the depths of reddit somewhere for my eyes to see or not enough people aren't buying top end CPU for virtualisation on linux (which makes me sad)
Would love to go intel but I have no clue how the e-cores gets affected by KVM.
@@MLWJ1993 True, it is. But choosing between a couple of extra Watts while browsing or having to deal with random Win 11 updates breaking Ethernet drivers (had this happen yesterday on my media PC) I'll stick with Win 10 until Win 11 is as functional and proven as can be.
@@Innosos It's always interesting reading about these issues. I've personally yet to encounter anything glaring, only thing I had happen was my wireless adapter installing an outdated driver that made my PC bluescreen during large downloads, which hasn't happened again after reinstalling the driver.
I’ve got a passively cooled system where every watt counts, since it’s the biggest constraint. After extensive testing, I found the most efficient configuration is 8P/0E on a 12700F. Like you said, the P-cores are actually more power efficient, but also not having to deal with the E-cores the CPU can run at even lower voltages while still heating the peak speeds of the P-cores.
Try Zen 4 Eco Mode maybe
Super imteresting! More like this analysis please! ❤
I wanted to make a video like this but I just didn't know how to word it or structure a video. This was a nice upload :)
@@2kliksphilip True, I’ve seen people ramble on for 30mins talking about it. I also couldn’t decide whether to condense it all within 10ish mins or let my thoughts out for a longer vid.. in the end I guess it’s all about being yourself but tho kinda hard since I’ve never had my actual voice on the internet, haha
Seems like OEMs swapping market segments to be. AMD seems positioned to capture the gaming market provides the emphasis on single threaded and rasterized performance across the lineups. Meanwhile Intel seems to be building up their competence in async multi core compute, a segment previously dominated by AMD. Different markets if you ask me, and both companies are still making some crazy gains in the department or server architecture, with the highest RAM throughput we’ve ever seen by a long stretch.
I'm still into this, because I want fast cores for gaming and immediate recording in OBS, but I also have encoding tasks that take forever to do that would benefit from having more slow cores that are energy efficient from running at reasonable clock speeds.
The nice thing here is that the e cores are totally capable of recording very high quality in OBS. Though this is assuming that people learn about CRF rate control on x264, or how to do proper dynamic bitrate with NVENC (CQ-VBR).
I’m pretty sure that intel igpu are better at this than ecore. You can use both gpu at the same time.
@@maou5025 Sorry to say this, bud, but x264 is better and more space efficient at this task than QuickSync.
@@BottomOfTheDumpsterFire on pcore yes, ecore no. On full ecore load it will bog down your pcore due to both used the same ringbus. Meaning running on your igpu will cause less slow down and you can still do both job at the same time.
0:39 thank you for bringing up the inter-core latency. It's still an issue that I deal with on my 3950X. I love this chip, but in real world gaming, it feels like Intel just works without fiddling based on the other systems I built and tested for people I know. It was even more clear that it was an issue due to "legacy" or "game" mode in Ryzen Master that would disable a CCD, and how they moved to an 8-core CCX in Zen 3.
Also, while I am kind of eyeing thread ripper for a workstation build, I would love to experience the thread scheduler on Windows 11 for the 12/13th gen Intel chips, being someone that uses Process Lasso for my 3950X daily.
E-cores will be nice for laptop/embedded SoCs, potentially even with just E-cores to replace Atoms and the worst Celerons. But in desktops I have to wonder if 4 E-cores really handle background processes better than a 2-thread P-core. Add that it limits the amount of intensive programs or virtualization that can be done at once, and it seems like a just a way to get around ringbus limitations that make 16+ fast cores impossible until they start gluing together chips.
Glued p and e cores Sound pretty good in Terms of yield rate. It would be more flexible, too.
thanks for your coverage of these niche topics that I wouldn't even know are a thing. This is super interesting!
you need to look at jim keller. he designed zen which is amd roadmap to big little. he then went to intel and did the same. intel have the clout to make the switch sooner but also had more need being unable to get past 10nm and reduce size/power reqs.
@@2kliksphilip not sleeping on that fact dude, i know you did but that is only part of his story in this. i mean if you went down the jim keller rabbit hole you would see he is the daddy of modern cpu across the board. i mentioned it as that is the fact you seemed to miss, or maybe glossed over?
none the less the video is a good watch and an interesting take on the current state or modern cpu. do you have any plans to get a new amd setup to talk about and compare your experience with too?
if you look at AMD's recent sever chip talk, they announced a CPU family called Bergamo, Which I think uses a similar approach to intels e cores, The max core count of the CPU goes from 98 to 128.
Hopefully that technology might filter down to the next generation of user CPU's
I wouldn't call it about the same: the Zen 4C cores are nearly the same as the regular Zen4 cores. They just trade a lot of the die space used for cache on more cores.
@@BWTHeuSeD There have already been a bunch of hints that the next generation of Ryzen chips, 8000, will come with 16 Zen 5 cores and additionally a die of 16 Zen 4C cores.
if its in development right now, we wont see it for easily 3 or 4 generations. like Philip said in the video, it can take around 5 years for a CPU to go from design to on the shelves.
@@X4Alpha4X "if its in development right now"
It isn't. Companies don't announce products when they start development, they do it once they've finalised the design and are nearly ready to launch it. Bergamo is coming out in 2023.
Hi Philip,
this comment is completely unrelated to the video, but a video suggestion.
I'd be interested in a video which shows all (or some handpicked) geforce driver fps comparison. Like a plotted graph of these values or something like that, I am sure you would be able to visualize the results perfectly.
I don't know if it is even possible, but starting with version 1 up to version 526, which is the current at the time of this comment. I think this would be a very interesting video.
Since this is my first comment on one of your videos (at least I don't remember ever commenting), here my obligatory complement:
I am watching your videos (all kliksphilips) since I can't even remember when. This is one of the greatest quality content on youtube in my opinion. I'm glad you are still active!
It's nice to hear someone not call the E cores "useless"
the problem with the E/P setup is that it has diminishing return on the high end, 7900x/7950x and 13700k/ 13900k are nearly parity single and multi. its good for entry stuff, but chiplets are just flatout more scalable. a 3rd chiplet die is a lot more practical i feel.
A Zen 4 core is about half the size of a Golden/Raptor Cove (P) core.
A Gracemont (E) core is about half the size of a Zen 4 core.
A P core roughly matches 1 Zen 4 core in performance.
The 13900K fits 16 E cores in 50% the area of 8 P cores. If this was 8 P cores instead (for 16P cores total), overall performance would be similar, but the total area taken up by the CPU's cores would be 33% larger, and power usage would likely also be higher.
@@saricubra2867 i said HIGH END. 7900x and 7950x. i never mentioned 5 or 7, as thats where e and p is more suited. low to mid.
My only wish is a day where there is a proper 4-4-4, or 4-2-4 layout chip for the average user.
4 honking P-Cores that will annihilate everything before, like we're seeing even today.
4/2 "M" Cores that are just there to boost the core number and give some performance back to the user.
4 hyper-efficient, true "E" Cores which can clock down to
Thats basically arm’s dynamiq design
@@mtunayucer Yes, and also Intel's current architecture, just better executed.
ARM's DynamIQ architecture was just a bandaid response to dwindling single core, nothing else, with one core now dedicated to buffing that up.
Here I'm wishing for just a very well balanced CPU with real advantages
These core setups are basically like the option in windows that allows you to physically assign certain cores to do certain things for possible efficiency, but better.
Using that feature in windows sometimes made background apps perform badly, even if you gave one program two cores, it was bad. Now with these E cores, all of your background stuff is basically being forced on those cores, but won’t cause those apps to perform bad.
Though I still feel like the efficiency of the P and E core setup needs work. Like when the P cores have nothing to do, have them clock down enough to use almost no power, while the E cores basically sip power to keep background stuff and the PC on lol.
They are efficient - put them against the P cores at the same speed and run them at 100% and they consume WAY less power - but will even be just as good in many, but not all, tasks. Really, most of everything you do on the computer should be running on the E's with the P's reserved for the power-needing stuff (games, compiling, etc.).
You know - like phones - where Intel got the idea.
I can't believe how good the 5800 x3d is. I don't see my self needing anything else like maybe ever lol
CPU microarchitectures generally begin their development cycles 2-3 years before rollout. A great example is AMD; Lisa Su joined the company two and a half years before Zen 1 came out, and she's generally said to have started the project during her tenure as CEO from my understanding. That's all to say, it's very, very unlikely that the 13th gen is the first one to be made with Ryzen in mind. It would be much more likely to be the 12th or, more likely, 11th gen. It's technically possible the 10th gen was made with Zen in mind, but on the desktop side there were remarkably few generational improvements in that release so I doubt it.
Computer scientist here.
You're pretty much on point. The idea behind e-cores is that many computations usually don't need the kind of power (which usually also means HEAT generation) that p-cores aim for. The problem with having only p-cores is that you'll generate more heat (meaning more thermal throttle) and saturate more of your cache, not to mention performing more of what we call "context switching", which is when a process changes from, say, core 0 to core 5 because the region around core 0 was getting too hot. This is especially costly, because you have to move all of the workload in the pipeline from one core to the other and that is hella taxing on performance, but unfortunately we're limited by the technology of our time and this is the only way that we are able to do this. Having P and E cores solves or at least minimizes most of these issues, though.
Also, like you said, the idea behind using lower-power cores most of the time and only using high-power ones when needed is relatively old, and phones have been using it for a while now (especially the ones with snapdragon SOCs). Intel just brought these ideas to the x86 CPUs, and the results speak for themselves.
Personally, as someone with some experience in this area, I think we'll see a shift to Intel's strategy in the long term. The P and E core architecture is kinda like the "new kid in the block" and much of this type of technology is not really explored yet. Exciting times ahead!
What do you mean especially snapdragon socs? They all use it. I think nvidia did a form of little core first too.
I think they will eventually follow the original script of ARM cluster sooner or later. Windows wants to stay in SMP as long as possible. This is basically the chiplet design Intel is avoiding. The bit.LITTLE was originally created for the operating system to dynamically scale power quickly. It was never a performance design. Mobile needed an answer quick and needed something which scaled in the future. ARM choose SMT over SMP. (Redesigning the core was and still is pointless.) The idea being cores can come offline dynamically. This was SMP so user management only. Programmer was to be hands off.
I look for the PCIe chiplet design to eventually win. PCIe interconnects are actually more powerful than people realize. This is hidden in the north bridge, but it started the i series. They knew this from the start. Truth is they have all slowed way down. Intel is actually trying to catch up and AMD is hanging on for dear life. NVidia actually owns a lot more than people realize. They wanted ARM for a reason, but I am not sure if they still do or not.
The real problem they are in is performance per die space. With e cores they throw away die space. With p cores they need better programmers. They are screwed.
Meteor Lake could be like 11 gen with tiger lake. Mobile only, with older stuff in desktop.
It's very difficult to make tiny cores power efficient for a number of quite technical reasons (specialized instructions, trace length , memory overhead/delay). I really look forward to seeing how intel combines chiplets with e-cores however as it absolutely allows for the possibility of larger e-core dies.
If your smaller cores are risc, it wouldn't be much of an issue. (they most probably are)
@@animatrix1851 The current E-cores in Alder and Raptor lake are full X86 64-bit cores, just small and lacking multi-threading.
I think the end goal would be a specialized architecture that is purpose built for the common use cases of E-cores is the best bet.
I'm getting HUGE stuttering in Metro Exodus Enhanced Edition with E-cores enabled on my 12600K/RTX 3080 rig. Disabled them in BIOS and my gameplay experience is extremely smooth now. Those E-cores may be the problem sometimes.
The problem there seems to be the thread director that is still not mature enough to properly assign loads (which is stupid given that we are already on the second generation of hybrid cpus). Have you tried assigning affinity to your game instead of disabling e-cores? Might be a better way of handling the issue without effectively throwing away the cores you already paid for.
i have no issues with my 13600k on metro exodus, smooth AF* all cores enabled
@@nivea878 good. Might be Windows 11.
Most desktop users don't need cpu power saver while they spend energy into RGB LEDs
Heard there were communication and sequencing issues between the P and E cores. Has that been resolved? I'd imagine so.
That goofy jester character is perfect.
Only gripe I had with P+E cores was operating systems not handling them properly for a few months.
You can use Process Lasso to force programs to run on specific cores on your PC. I used to use it to game on six cores and ffmpeg on the last two.
that is really cool. thx
just use task manager's set affinity function?
@@ipodtouchiscoollol That's true however it resets every time you launch the program. Process Lasso can be set to run continuously. You could make a shortcut to append the specific cores to run on as an option at lauch of the program, but I don't want shortcuts on my Desktop.
Puts a new meaning to the phrase "E-waste"
Thanks mr Philip
Intel started the race against Ryzen with higher clocked cores and bigger transistor size. They recently started switching some of those with something called "E" cores to up the multi-core performance and scalability. Now it seems they are planning to slowly get rid of the higher clocked "P" cores in favor of more "E" cores that are generally lower clocked.
AMD in the meanwhile started the race with Ryzen's scalable chiplet design and has been upping the core clocks as they go.
At one point in the future, AMD will probably have higher clocked cores and the prospect of just including more chiplets for even more scalability. Since AMDs cores are all close to each other in performance, I'd say this gives AMD an edge on the long run. (More chiplets, more cores, higher clocks).
We can take a look at EPYC processors to see the heights AMDs consumer designs could potentially reach over time. AMD doesn't need to copy this E-P core design, it is Intel's attempt at shifting strategy to match AMDs design in the long run. This feels like Intel's transition period to a more ryzen-like design. I bet they had this design sitting in an R&D branch for decades and they only really started pursuing it after Ryzen became a threat.
I think Intel is still playing catch-up for the long run, I feel like these back-forth in the last couple generations is not a big indicator that Intel is definitively back on top, yet.
Lets hope the kinks in ARM are ironed out by then and it replaces x86 so we can finally have actual efficiency with high performance and even more competition in the market. It's kind of a waste to be throwing 200W at a processor.
Both companies architectures are brilliant. If a little to much on the power consumption side.
The E cores ARE super efficient... space-efficient Cinebench accelerators, that is.
They're pretty power efficient too, if you run them at the 2-3GHz they were originally designed for, instead of massively overclocking them by default like Intel did.
Literally the only reason the 13900k can trade blows with the 7950x in workloads...
They're only as relevant as they are because intel doesn't have a nice solution to automatic undervolting the way ryzen cpus have. E cores dont solve the problem that you think they do.
ARM's big.LITTLE architecture was designed with power efficiency in mind, to put simply only one big or LITTLE core in a pair would be powered on depends on the task running on the core, and it can switch between the two on-the-fly. (Later design do allow all big and LITTLE cores to run at the same time for maximum performance, in which case efficiency is out of the window.)
intel's P-cores and E-cores aren't designed in pairs and can't do the same.
I don't, know why but it always love to hear you say the phrase "a hell of a lot of" but it always gets condensed into "hullolotta" or something else indecipherable. like at 4:26
There's musings going around that an E core is more or less equivalent to an 6x00 era chip (i5 6600 for example)
Oooooh, so THAT's where ChumerShenbark's EFps come from ! They knew it was coming all along.
I don't think you touched on the big benefit; CPUs are advertised by core count. Even if the E cores couldn't keep up with AMD in multithreaded workloads; intel can throw "we have 24 cores and they *only* have 16" at consumers for the 13900K and 7950X.
As someone who doesn't do rendering or other all-core workloads, I hope AMD doesn't do the hybrid design like Intel. I like knowing that I don't have to care what process is getting assigned to which core by the scheduler. This is still wreaking havok on all sorts of applications, years later.
since CSGO is a CPU intensive game it's only common sense that philip has a tech channel
Coders are gonna love multithreading their games after dis one. To bad they don't.
AMD will certainly add big little to its roster as well. In the server world they have shown their new Genoa architecture, which have a Bergamo subtype for cloud computing, that is basically a whole CPU with just E cores, but many more of them. Given that therefore the basic core design is there, and ARM & Intel have done the groundwork on OS & app support for it in their respective markets, I would be more surprised if we didn't see it, especially since AMD could just make an E core chiplet and flexibly combine it with one or more P core chiplets depending on the target market. Especially for mobile, server & embedded this will become more important, especially since x86 also has to fight against ARM more and more in these fields. ARM Windows may yet be small, but there is Apple, who have increased their marketshare since their ARM transistion, in servers ARM is a lot more present, and in embedded it is already king.
On laptops, the e cores are ok. On desktops, sure but add more p cores to your highend chips...
At least Zen4C cores are supposed to take half the space of the regular Zen4 cores and be only 10% slower. So, we could get some 16 core chips that are a bit slower single thread but good for competition with Intel's 8P 16E models.
I think the situation is very simmilar to the bulldozer times - lots of cores and high power consumption. And that didn't go very well for AMD back then. And until the next gen consoles - it seems we are more or less limited to 8 cores. - And they better be the best 8 cores possible. - In laptop land - whoever can achieve the most in 15 - 45 watt will be the leader
Have a thinkpad with amd 6850U runs 51w in performance mode but slow it down to 3w idle and 12w max its around 90% as fast daily use, battery lasts 18hrs
Very different situation, as those “cores” were really bad in single thread, while this has high performance cores backing them.
The difference is that the bulldozer line was a huge lie in many areas, including its "cores" which were actually core-pairs capped to FPU modules. So if you had an "8 core" FX8350, what you really had was a 4 core processor with ironically worse performance than the standard core in other architectures at the time.
@@hannahtimson2526 I have a very similar 6980HS. 4W idle, 25W max on battery, but I can unlock a 75W power limit when docked, and it can take more from the GPU if needed.
Smart shift has been a brilliant system so far and I hope something similar is adopted for desktops in the future. My SFF PC could have something like it.
an intriguing prospect
Since most games are generally terrible at multi-core optimization, what if we replaced 4 P cores with 2 BIG P cores?
Or we could just have one refrigerator-sized core.
It would be really fast and also useful for other tasks such as frying eggs.
Imagine if you replace all but two p-cores in the 13900k with e-cores. That would be one hell of a web server CPU. Two p-cores for internal processing, each e-core for a group of clients.
The funny thing is that even the e cores are a s fast or faster than normal skyline cores which aren’t exactly slow, even by modern standards.
Intel's strategy makes sense because optimizing games to use more and more cores appears to be a rather difficult task, so having less powerful cores allows those cores to run a little faster due to having both slightly more energy and available and not getting as hot due to less powerful cores running under the same IHS, and on the other hand software that is highly threaded cares more about the amount of cores than in their speed.
A possible problem of this approach is encountering errors or simply seeing less performance due to the OS or the software itself not being able to efficiently distribute their workload among the P cores and the E cores.
NT is getting better at bigLittle. Aparently Win11 has better scheduler than Win10.
I feel like there could be some catches using P+E design since benchmark programs either stress 1 core or all cores. What if a software uses all available P core threads + 1 more? Let's say there's a task that uses 7 threads, 6 threads are run on P core, one thread is run on an e-core, would that one extra e-core performance delay the task completion since P core threads complete their tasks first but have to wait until e-core finishes its task? Or would the task being done by e-core move over to P core whenever P core becomes available hence overall performance is less impacted? I remember reading a forum at intel web some users have reported weird performance drop when mixing these thread allocation by fiddling affinity settings.
Generally no, the E-core wouldn't hold up the program in this situation, because scalable multi-threaded programs (likely almost anything that would scale to 4+ cores in the first place) don't typically allocate a large chunk of work to each core upfront - instead they break the work into a larger number of smaller tasks in a queue, and a pool of worker threads grab tasks from the queue. Each thread grabs its next task as soon as it finishes the previous one, until the queue is empty. So if one core is slower than the others, it ends up grabbing fewer tasks, and finishes its last task around the same time as the others.
The OS scheduler could also move a thread from the E-core to the P-core, just like you said, but it's not really guaranteed, and it would only partly mitigate the problem. What's more likely is that a heavily multi-threaded application will be written to avoid relying on the behavior of the OS scheduler as much as possible.
I still can't believe Intel Glued on cell phone cores like that :)
Big-Little multi chip designs are probably going to be a persistent normal thing for decades. The two technologies seem made for each other. While Big-Little really struggles in the frame of energy efficiency on desktop in large part because of the inherently inefficient infrastructure that desktop CPUs are built on, I suspect that it will become better. Who knows, maybe they will find a way to actually implement a sort of RISC concept to E cores in 10 or 20 years. and in terms of multi chip designs, I suspect that those will become universal. The benefits are proven and the scalability makes it essentially a no-brainer in the long term. The potential downsides will primarily only manifest when infinity fabric latency isn't fast enough to keep up with single die designs but with designs such as having a single P die and 2 E dies, they could avoid the brunt of that problem by keeping latency at a minimum when it's most important.
What I am hoping to see with E-Cores is simply them handling more of the background processes so that the P-Cores could focus on my activities without any sudden interruption or slowdown. This could be achieved by better core management in the OS instead of hardware but at this point, from what I have seen, isn't likely to happen.
fake core 💩
you upscaled that picture at 1:21 didnt you?
I am REALLY stoked for Zen 5. Why? Because they‘re apparently going to do the same thing with Zen 5!
The Kicker: Zen4 will be the „E“-Core!
It would make sense with their chiplet design. Putting Zen 4 and 5 CCDs on one package would make that fairly easy i‘d say.
On top of that, we have Zen4c, which stands for compact, which is designed for more cores on the same die-space, at the cost of cache, but these e-cores aren’t meant to be the performance monsters anyway.
On top of that Zen 4 would then be a tested design.
ADDITIONALLY AMD could manufacture these with an older node, to safe on costs. That this is doable is shown with RDNA3.
Th GCD is 5nm, while the MCDs are in 6nm and the I/O does for zen also share this approach.
They also said, that Zen 5 is in for a huge performance jump.
It would really add up!
Scheduling them efficiently is the real problem. Especially user space software would not bother doing it anyway.
Just multiprocessing applications to effectively and efficiently leverage multiple cores is a complex problem that varies with :
programming language implementation and limitations (each one threats multicore execution differently),
computing problem needs (not all computing issues multiprocess in a simple manner),
computing loads (some loads are sustained while others ar bursty in nature)
bottlenecks (IO bound loads vs calculation bound loads)
Expecting the usesrpace software to handle core type allocation is just another thing to the already complex mix of stuff...
these chiplet pictures are upscaled...
I would like to see a 8 or 16-thread variation of ADL-N coming to the market, and this would be enough for ~90% of PC users.
However Intel being Intel they won't sell this cheap.
On the desktop it makes absolutely no sense what so ever. Especially when your chip uses 250 watts plus. On mobile it's a different story entirely
Ryzen appeared while Intel was stuck and unable to progress in their process nodes. They had the microarchitecture designs, just not a way to manufacture them. They still haven't fully recovered from that, and don't expect to catch/pass TSMC for a couple years or so.
Ohhh i see a lot of upscaling in this video :)
One day when I upgrade from the Zen 3, I will have to build a whole new computer (besides the case). And until then, it's exciting how Intel and AMD are actually competing in my mind. Whoever I choose next is absolutely going to be the one with the best POWER EFFICIENCY, as a space-heater PC sucks when you live in a sub-tropical climate like I do, plus electricity isn't free. Even my current 350W PC makes the room uncomfortably hot when running full tilt.
Ironically, you can take advantage of that efficiency even today. You can buy a higher end chip and slightly under-clock/under-volt it, or buy a lower end chip and do the same. Many programs today don't really need that top-tier performance, even games. And they run so well that you likely won't see much of a difference by dropping it down a bit.
For example, by turning off SMT on my 3950X (since I rarely do anything that maxes out all the cores), I brought the peak TDP down from 160W+ to < 100W. It even idles around 15-25W instead of the usual 25-40W. You could even grab a 5600X and under volt it a bit, where its rated TDP is still only 65W despite being a 6-core chip (compared to the old HEDT Intel chips that took 100W+).
In future pcs will be cooled by external units, like ac, so no heat inside room
did you (ai) upscale the P and E core pictures?
Ive come to understand this as "What if you had an older style of i5 cpu with two pentium processors along with it." "Three cpus in one" so to speak
@@2kliksphilip Well that's even better then. Thanks!
The core architecture is often years in the work, but even there, changes are being made till the last moment.
Scaling up core count however is massivly easier. I would be suprised if the direction Intel went wasn't dictated by Ryzen, even before Alderlake and the such.
They would be more expensive, and i7 would be i9lowend and i 5 would be i7
the final of that big.little architecture will be when (if ever) windows works correctly on arm I think we wilm have p cores and arm cores for efficiency
Likely amd already has this in mind as they are absolutely dominating the performance per watt, as in it’s not even close by any measure. This can be seen in the server market. It takes several years to design and manufacture something like this, as you pointed out
You need to better informed. Most tech media outlets do a poor job and evaluating efficiency. Those who actually spend time and do it properly found that in real world use that would define more than 90% of consumers, intel just about edges AMD on efficiency.. why? When intel brought big little, most people didn't realize how low their CPUs can idle, under 3W for some desktop chips. On top that, their P cores are extremely responsive and offer peak performance very quickly at high power and ramp down to their crazy low idle power. This peak is like microseconds or milliseconds. So the chip on average consumes less energy when you monitor its use over long periods of time in common use cases. The media will focus on "it pulled 300W" on and edge case that doesn't describe 99% of users. AMD has serious issues with idle or low load power, and this is a fundamental disadvantage with chiplets.
This is cool and all but let's make a video on the witched 3 next Gen Update that was just teased!
Every competition is a GOOD competition.
Remember in 2011, when AMD release "fail dozer", Intel based rig could cost 2x even 3 times as much as AMD rig.
Nowadays, most Intel motherboard are cheaper than AMD motherboards.
what if they made two types of cpus, one focused on gaming, with say 8p4e and one focused with work 4p24e? since the E cores are much better per area for workloads
AMD just launched 96 core EPYC Genoa. Imagine if they took a page from intel and replaced all their 8 core chiplets with 2P/24E core chiplets. That would make a CPU with 24P/288E cores, 312 cores total. Insane.
@Captain_Morgan that's actually the reason why intel chose this approach. It allows the P core design team to go a bit crazy for single core performance while the e-core team can focus on multithreaded. AMD has to balance both, so its not a coincidence that their core size falls somewhere in between. If they adopt a similar strategy I would expect them to go a bit crazy too. Also remember that AMD Zen 4 is made on TSMC N5 HPC which is about 95MTR/sq mm, Raptor Lake is 60MTR/sq mm. It's quite impressive that intel still manages to come on top in single core all things considered
AMD Bulldozer did this years ago by lopping parts off, except they accidentally made all of their cores E-cores.
There is Zen4C, that said AMDs Zen 4 cores are more efficient than the Intel E-Cores and they have extensive clock-gating (Switching off unused parts temporarily) as well as very fast on-demand re-clocking.
Furthermore TSMC has a higher yield in their manufacturing process than Intel + the yields are significantly increased by the smaller die area of the chiplets.
As far as we know, Genoa (EPYC 9xx4) obliterates Ice-Lake (current gen Intel Server CPUs) in every metric we know. Sapphire Rapids probably won´t be competitive either, especially when looking at efficiency.
AMD even managed to beat Intel very hard in AVX-512 workloads with their mostly double pumped 256 wide design (shuffle is true 512bit for some operations). They have higher efficiency, less chip area and more performance, as they don´t have to downclock.
Intel can´t have AVX-512 with E-Cores as the E-Cores don´t support it, so it won´t be availiable on consumer Alder-Lake CPUs (Intel 13th gen). The AVX-512 area on the P-Cores is just dead silicon, which decreases the yield / increases manufacturing costs.
Once more software makes use of these instructions (games, video encode, AI, Simulation) Zen 4s performance will increase even more in Benchmarks.
AMD probably already has the "pads" on the 6nm IO Die in Place to simply add another Cache to the existing Zen4 designs, so 7600X3D will be released sooner or later i guess.
The recent leaks are interesting, but odd. Intel has released at least one chart that showed MTL as 8P+32E. It could be that 6P is enough to hold off Zen4 for the first half of '23, and also lower their power usage. If so, then maybe its not a bad idea. Power draw is the main complaint people have about current products.
I think 6 or 8 P cores are going to be good for a while for the vast majority of consumers, at least until games finally revise their thread situation and take some notes from the recent Doom games.
@@DarkSwordsman I don't even think that's very likely until we hit silicon's shrink limit. DOOMs job system is impressive, but as I understand it, it takes a lot of work to implement and is unique to each game, so you can't just "build it into the engine" so to speak. So as long as CPUs are getting faster single thread performance on a yearly basis still, there isn't much reason for most devs to put that much effort into it.
It isn't new info that meteor is going to be 6P. Consoles have 8 cores now so games will start to utilize more threads in the coming years. With a strong 6 core it will probably be fine though.
@@eniff2925 Consoles have 8 cores for the sake of longevity and have for 3 generations. Most games are still single thread limited though, and with the gains we are seeing, a new 4c PC CPU will match the consoles 8c in multithreaded performance by next generation. So that's not really a concern. But until a few days ago I had heard nothing of this, so I think there is still a chance this leaker is mistaking mobile SKUs for desktop.
@@eclipsegst9419 This is the first true 8 core console generation. Previous gen had double quad core cpus. If you look back the articles, there is mentions of this as far as the beginning of the year.
but witch chiplets cant you just add more normal cores and regolate their consuption through controlling frequencies?
What concerns me about heterogeneous CPUs is that, in some applications like e.g. Ableton with many VST plugins, scheduling a cpu-heavy software instrument on an E-core is going to get messy. So the DAW (e.g. Ableton) needs to know what it can and cannot schedule on E-cores, know how to tell the OS about that; and also plugins that do multi-threaded processing also need to know how to avoid CPU-heavy tasks being scheduled on an E-core (and before the CPU/OS has any profiling information to tell it)
Lol are the die diagrams upscaled via AI? Interesting artefacting there.
I just want 8 big, fast cores, no SMT, no HT, no E cores, no BS.
what's the problem with SMT/HT? It can be disabled in BIOS anyways (as well as E-cores)
@@niter43 No problem, I just don't wanna pay for it. They usually charge more for processors with 16 threads as they are used mainly for professional applications
12700k is an octa core cpu, disable e cores and HT and bam insane power
@@Fiwek23452 you are missing the point
Interesting, don't see much people focusing on E cores overall so this was a great deep dive
I'm more looking forward to AMD's 3D V-cache lineup versus intel's e cores in the low end. Then it'll REALLY be a 6 high speed cores vs a bunch of E cores fight.
It's a desktop computer, I want it to consume as much power as possible and bring the most performance, not being a shitty eco machine.
and now Userbenchmark is going to change their ratings again to favor more cores, with "P" and "E" cores counting in one single benchmark. Basically, while AMD's Ryzen 9 5950x will going to be rated a "0" on the 64 core benchmark because that benchmark somehow "requires E cores" to operate, Intel's 13900k would be able to score some number in the 64 core test.
Then they will say a processor without E cores are "trash" and "not really useful as Cinebench score determines how fast your CPU really is" and "not everyone plays games" etc etc.
1:20, that's only partially true, as both sides have some headroom with design changes. It takes ~3 years to take any big change to production, but small ones can happen.
technically ryzen appeared when 7'th gen was in flight, so 8'th were first that could see any change.
8'th gen intels were probably fairly unaffected, but it's possible they trickled down that core increase instead, so named i3 what was supposed to be i5 previously, and pushed them 100 or 200 MHZ harder than previously planned, stuff like that. 9'th gen had non-silicon optimizations, like thinner IHS, which is a direct result of ZEN, they pushed that silicon harder than they planned, again so they needed stronger thermals. 10'th gen already should be designed from ground up with all they knew about 3'rd gen ryzen and new all about chipsets and their scalability. It was issues with 10 nm that stopped intel from responding properly.
I believe they had issues with 10nm because zen was so strong that it was to weak, for issues it made & they restarted whole 10nm from ground up.
4:20 that's not really the case, its very situational. Because intel did not give us cores for last 15 years, 8 was absolute maximum, most game engines just dont assume you have more than 4/8 and focus on squeezing as much from 4/8 as they can.
games have clear benefits of more cores (depening on a game) up to 8 cores, after that, you stop windows updates, antivirus, browser and all other backgrounds from taking cpu power from your game. Stuff like that don't really need to finish ASAP, so they can slowly finish in the E core. It also have a benefit of stopping windows update/telemetry from completing in 10 seconds, while taking max power from your ssd/cpu/network, so slower core by chance evens out spikes of windows background activity, making it feel much smoother.
Wonder how E and P setup is with CFD software?
AM6 could use 4 chiplets. I could see putting full cores (perhaps more than 8) in each of two chiplets and then have 2 chiplets with secondary cores, up to 32 each if they use the same 4-1 ratio Intel uses. or perhaps 1 chiplet for mini-cores and one for npu or gpu functionality. Though balancing heat and power distribution efficiently will likely be a challenge. I'd really like to see a 4 chiplet based hedt lineup as well. 32 cores and at least 64 pcie lanes from the gpu.
So the next zen5 Will have 16 P cores and 128 E cores?
for Video Games, or particularly, People that don't do Rendering and such, these extra slow Cores don't really do us much good. but it does help the Products compete in those infinitely wide tasks.
sooo at the end of the Day, while for me i'd prefer some more real Cores and zero slow Cores, if i can't have that, atleast what i can do is turn off the slow Cores and the on Die resources for them, can now be utilized by the real Cores. it's not what i want, but if i have to take it in order for Products to remain competitive in that Synthetic Marketing, then i guess there isn't an alternative. and i do still gain some benefit, just less benefit than otherwise.
this mainly being when your CPU isn't sitting around and waiting. some more Threads are useful if all of your existing Threads are stuck waiting on the work they're already doing. but why anyone would Buy a fast CPU only to themselves configure it in a way that kneecaps it, is beyond me. if your real Cores are allowed to go fast enough that they aren't sitting around doing nothing, then extra slower Threads don't really do much for you.
and yeah, CPU's always have long roadmaps. you have to schedule your Fabrication multiple Years in advance, as Fabs are freakin' busy so you gotta make Reservations early. no such thing as a rush job when you have so many different Customers.
then the R&D time before that.... yeah, nobody is making Chips in a reactive way. not the way the Internet likes to pretend atleast.
People also act like GPU's can be reactive when they're behind the same obstacles. ain't nobody making a new GPU design in a few Months after a competitor makes a release doing or not doing __. that's just not possible.
let's round that out with that i'll mention the Silicon Bridges you're referring to with Intel - while it's atleast in part a reactive strategy, just like the rest about making Chips, it's expensive and very time consuming - they couldn't have just kneejerked it after seeing the competition go Chiplets. must have already been doing some research.
more importantly, Silicon Bridges is the current best answer to compensating for the performance loss of going Chiplets. lets you make Tiles without having to space them apart and cross into Substrate, so it should let us have the best of both Worlds until Optical Circuits become viable for Manufacturing. cool stuff! and Intel was very smart to have Patented that. i'm sure AMD wishes they had thought of that first so they could Patent it instead.