One of the best RUclips channels of modern time no stupid 2-3 minutes of un-related intros. No many minutes of sponsorships for random crap. Usagi Electric is awesome hope this channel keeps making this kind of awesome content for a long time to come
This is how YT should be. Highly informative and something you never ever would see on commercial TV. There are others like curiousmarc. I really enjoy how Usagi Electric takes us along for the journey. YT itself is in a terrible state, unwatchable without preventive measures. I hope I will able to see this series to completion before I have to abandon RUclips for good, and hope, if it ever happens, there will be a backup to still follow along. Very good content en very enjoyable you letting us watch it all.
One thing I'd point out with schematics is that it's far more readable to have inputs on the left and outputs on the right, as much as possible. When I started reversing something, I'd use the largest page size that KiCad supported so that things can be spread out and then cleaned up as interconnects begin to make sense. If you've ever looked at the schematics that IBM published for their PC 5150 or XT 5160, you'll see some clean design: Inputs arrive on the left of the page, the signal flow goes (mostly) left to right, and outputs leave on the right side of the page. Also, for long runs, a tone generator/wire tracer duo has some potential to at least help you find the general area that a trace is heading for.
My reverse engineering experience is limited and a lifetime ago. One particularly challenging problem was a bit-slice processor board for a fighter aircraft's radar. New boards worked fine when installed in the aircraft. But on our test bench, we would connect a console that was tied to all the data & address lines in the CPU to allow us to read and write to the memory. When the console was connected, the CPU would randomly reset. It was an edge case: some boards would never reset. Others would run for hours before resetting. I spent weeks with a logic analyzer trying to isolate the issue. We had the schematics, but the 6 or 8 layer PCBs were outsourced and we couldn't easily get our hands on the layout. And once we got the PCB layout, it didn't really help in finding such a rarely occurring issue. After weeks of trying we finally found the problem. To account for a part change, the board had been re-laid out by the vendor. Of the many changes to the traces, one turned out to be the problem. One of the databus traces lines connected two pins that were only about an inch apart. But the trace was routed all the way across the board where it made a u-turn around a single pin then all the way back across the board. The pin it looped around was (you guessed it) RESET. When the console cable & console were connected, the added inductance was just enough to cause the reset to get triggered once in a great while. A simple mod to isolate the trace and use a short soldered jumper wire between the two pins solved the problem for good.
to me that sounds like a total no-go for a military design. but as you are talking about it, i have to believe its really true. some "student" had done a design, no one did look after it, no one did a review, and finally no one did any in deep testing or simulation. you indicated it was a long time ago - maybe when there were not so much simulations and EMC test facilities around to make sure that anything is mostly sane.
I have seen stuff like that on PCBs. When you go to add a trace all of the obvious paths are taken up. If you are not willing to shift traces to make room, you get long runs.
I really like when channels like this take a few minutes to pause their projects and talk to all the people involved. This was fantastic. I have TubeTime's book and have built some of his recreations. Awesome convo.
I've done quite a bit of reverse engineering for work, but for software instead of hardware and I learned here that there are some interesting philosophical similarities with hardware reverse engineering. I've had tasks where it's basically "Here's this black box, make one just like it but with different hardware and system software" and often I had little or no documentation or even any software source. I would have to probe around on the inputs and outputs and figure out what the heck it was up to. Really interesting and different video this week for my usual Sunday morning coffee tradition.
This is one of the most fascinating interviews I have ever seen. To Eric I hereby award the designation of d'Apollo, to be added to his name, such as PhD would be added.
I've recently been messing around with '70s era TTL ICs building some really basic circuits, seeing a complete system built from this tech is really interesting to me!
I'd suggest attempting a similar conversation with another Curious Marc colleague, known there most often as Master Ken. He has reverse engineered individual chips, electromechanical beasts, and even more marvelous things.
In the early 1980's I worked for CAMBION, the Cambridge Thermionics company, in Pittsfield NH where we did the metal stamping and screw machine production of pins and standoffs as well as the molding of the IC sockets. At our Cambridge facility we did automated backplane wire wrapping where we passed the pin location and a cut/continue code. Could be a fun exercise to drive a 3D controlled wire wrap tool!
i guess he might rather want to go for a PCB with traces - but the traces density could be too high, and the signal integrity might be in danger. furthermore patching such a board in the case of an error can be a horror up to non-solveable. good luck to him - and indeed such an automated solution could be a very valueable time saver.
In 1982 a friend reverse engineered the IBM PC motherboard and CGA board. He found that putting a drop of water on the board would allow him to see the inner layers. So he would trace them by slowly pushing the drop around with his finger.
From my little experience doing this sort of thing: 1) Go get the datasheet and application notes for any complex chip. You are likely to find that the circuit you are working on looks a lot like what is in the application note. Once you have found that section of circuits, you can kind of draw a box around it and treat it like a module in your thinking about the rest of the board. 2) Although no rule says the pins of a buffer chip have to be used in order, you will often find that a bus goes to, lets say, an 8 bit buffer using the gates in the order on the datasheet. If not try the reverse order. 3) Verifying the power supply connections on all of the chips can get you quickly past the question of whether this thing has multiple supply voltages. This only applies to things that might have that for some reason. 4) Chip placement on a PCB often follows the placement on the schematic but it may be rotated or mirrored 5) Multiple monitors on your PC can help a lot because you can have more stuff in view
Stop reading comments already! Go get "Open Circuits" right now, seriously fascinating exploration of components at microscopic level. Beautifully photographed with very approachable explanations. I've had the pleasure of working with Eric for a couple of years and he is hands down one of the most brilliant engineers and nicest people I know. Eric, I want my copy signed.... Usagi, this looks like a super cool project, best of luck! I can't wait to see where it goes.
@@TubeTimeUSI just subscribed to your channel. 🙂 I can't believe after all the videos I've seen of you working with Curious Marc, I hadn't been to your channel yet!
Someone send this man an ESD mat! It's winter and the air is dry. A useful tool is a TDR rig - Time Domain Reflectometer. You can measure the length (in time) of a trace and whether it has branches by looking at the scope. You can also touch a via with a metal probe and see that change in the impedance on the display if it's connected to the trace.
Staying motivated: Treat it like a squirrel gathering nuts for winter. The squirrels not overwhelmed or discouraged by the size of the task because they're working on one acorn at a time. Forget the big problem; break it down into the smallest achievable goals you can. Concentrate on getting those small goals done and the rest will follow. This mindset has been the *only* way I've managed to power through some of the larger projects in my career. I apply it regularly when programming or reverse engineering legacy code, but it works for just about anything.
Did I ever talk to you about how I reverse-engineered all the boards for the Entrex/Nixdorf Trapezoid Terminal? Or a "Mystery" Data General Nova-compatible board? We should compare notes on this! You've done, yet again, an EPIC job on this video!!!!
And, with ALL of my rambly comments, I must emphasize, Eric aka TubeTime has been one of my major inspirations for YEARS! And I LOVE that we all get to chat with him on a regular basis... Looking forward to our next discussion with him as a follow-up to this video!
Even if it’s a four or six layer PCB, I think Usagi’s old PCBs are made where there are no buried vias. This means all vias go through the PCB. It also means no trace in the inner layers isn’t connected to a via on both sides of the PCB. Knowing this, you can ohm out every inner trace… eventually.
are you talking about the board having nothing like the things called "burried vias" - an item that will be in place since maybe short after 2000s? to my understanding the inner layers are first etched and then they will se application of vias. after that the outer layers are glued upon and the vias for them are added - with some doing as well giving contact to not only the outer but also some of the inner layers... i think it went popular when BGA and other dens grid package interfaces went into the industry. so folks could go for power and ground with just a single "drill hole". and at the same time the space for the data and control traces was a bit reliefed from pressure. also a reason why a lot of chip have ground pins in the center. (by the way, the GPU in the image had those interconnect metal layers areas with vertical traces on one layer and the horizontal traces on the other layer. so your chances as a designer to run out of space or have unexpected interactions have noticeably gone better during your overall design procedure - giving your better chances to solve the design riddle.)
Thanks for Eric's insights! Much appreciated. Feels like The Amp Hour but with video, haha! It's a good thing. You could get in touch with Ken Shirriff (the one who works with CuriousMarc) - his insights will certainly help a lot, he's a genius in his own right after all. I agree, KiCad really could use a reverse-engineering feature! Truth be told, I don't know of any software that can do that by now, but that would make sense for dual layer boards. Not all that useful for multi-layer, though. And oh, I do get confused with the spaghetti mess a lot too. I wouldn't rely on a KiCad 3.0 tutorial, definitely use something newer as the software has changed a lot especially since 6.0, and we're at 8.0 now. Ha! I love that book, it moved me deeply when I took a first look at it and I made a review of it, which turned out to be the single best performing video on my channel: ruclips.net/video/Mqo_sgsdTRU/видео.html - take a look and grab the book, it's absolutely worth it! A thing of beauty, a joy for ever.
19:50 He says you will never have two output pins connected together, I want to specify that he is not (or at least shouldn't be) referring to data bus lines nor tri-state logic circuits. Example: Chip A output, Chip B output, and Chip C input are all tied together on one node/net/connection that is referred to as "DATA". Either Chip A is outputting and Chip B output is floating, Chip B is outputting and Chip A is floating, or Chip A and B outputs are floating. You will typically see this with Digital circuits, and you should typically be able to tell based on the chip.
@@TheVirtualWatcher .. and in a few cases things coming off of what really are the emitters of transistors. Some analog window detector circuits work like that. Multiple LM311s can be wired together like that sometimes.
Step 1 assemble a mini computer. Check. Step 2 repair a vacuum tube computer. Check. Step 3 build a vacuum tube computer. Check. Step 4 do the impossible... he's working on it.
I have always wanted to go to a VCF. The east one is in NJ - no one wants to go to NJ. However, I often visit my family in Texas in April... But wait... Why not go at the end of June and go to VCF SW? Why not, indeed! So I rearranged my trip so I can go!
Those pictures of the isolation amplifier internals would make great wallpapers and posters and I would love to hang that on my walls - that bond-wire transformer is just beautiful :o
Great video, thanks! Worth remembering that the copper for inner layers is normally thinner than that for outer layers. It would be interesting trying the brightest illumination you can find (500W spotlight) to illuminate the back or front of the board and then use a digital camera to photograph the other side. Do it for both sides. the digital image can be manipulated to show more detail than you will ever see with Mk 1 eyeball, and might mitigate some of the issues of not being able to remove the ICs.
Hi, i did some RevEng myself when i was in the R&D biz. I/we also used an old Xray machine that came from a security checkpoint. It had make things a lot easier ;) also a bright light helped a lot and even we desoldered a board completely and put it on a modified copymachine which alowed us to brighten up the light and while the top was heaviely over exposed the inner traces had been nicely visible on the copy. And if you have some scrap boards you can burn out the inner traces and see where they conected by simply burn them down and see the damage. Also you can use a modified microwave oven, where you can switch the magnetron on/off with a dedicated switch, for a second and burn down the upper layers and peel them off afterwards leaving only the inner traces intact and lets you buzz them out a bit more easily. but these is only possible if you have some scrap boards as well. cheers.
22:02 "symbols on the schematic with nothing connected to the pins". I have a different procedure where I create a preliminary net list based on what is already known about the chips, and then use that to track the changes on the PCB side, then use KiCad's feature to transfer the netlist back and forth between the Schematic and the PCB. Again, I'll show you!
Great interview and tips - ingenious, the brush! Thanks much! Regarding the rules of thumbs for re-engineering and "output -> input" schematics connections, I'd like to mention that there are (as always) exceptions to these rules. One exception would be if a developer intended to let current flow between OUTPUT = HIGH and OUTPUT = LOW pins, which is a very common use case for Microcontrollers if they are configured as PUSH/PULL. For example, if you intend to drive an LED (or LED Charlieplexing) with an ATmega MCU, you can't let current flow between an OUTPUT and INPUT pin. You can source current from an output, but not drain current with an input. Hence, to let current flow between GPIOs in PUSH/PULL config, you would need OTPUT = HIGH for the LED Anode, and OUTPUT = LOW for the LED Cathode, for example. So, indirect OUTPUT -> OUTPUT connections are a thing that you will see in practice.
The size of the task may be a bit daunting but the process is relatively simple. Draw all the chips. Buzz out all the connections. As you discuss in the video, a lot of the connections are known, power and ground, and depending on the device function, the likely connections can be narrowed down. At least if all the chips have their part numbers functional areas can be identified (some years ago I reverse engineered a board, somewhat smaller than yours, which had all the chip numbers removed). Since you want to sort out your backplane, start with the edge connector. You may be able to determine sub-circuit function fairly rapidly.
It is definitely huge. how about x-rays and especially using x-ray layer imaging? it will most likely be able to penetrate and unveil any burried traces not visible to the methodology you were speaking in the vid. i personally could imaginate, that HF probing would also be a cool method to track down not only the burried traces but any traces. (done it with just power wires in walls and an old phone amplifier coil that had originally a rubber suction knob to tap phone speakers. i do quite well remember these humming noises and how they did modulate their intensity with distance. - similar to that there were old style large CAD graphical tablets for digitizing with mice like cross hair centers - their front was a simple coil in a PVC glass piece and the backside was a straight grid of wires that helped locating that mouce center to a noticeably well precision. Just an MCU and some serial port required to hook it into any major CAD program.) something like an x-y axis system with a probe/sender on its tool handle (i have a cheap aluminium profile based china A3 laser model with maybe some options for alternate tools). so if you go for an edge connector set... as the second pole in the game - you can drive such a probe/sender hat across the board with a resolution as tiny as your steppers will allow. the edge connector might feed into a two-way "passive" CMOS transistor switch array and allow you to get one or more such external pins sample in a "divide the search space in halves" method. Lets assume you might be able to do one full edge connector scan (logical track down) per second. then you have 3600 such assignments per hour - and if its analog signal levels, its even more of worth. so depending on how sensitive such a setup might be... it can do maybe 100.000 or more such probings per weekend. - but i assume it will be even faste, because you have to expect lots of "blank" areas (from an edge connector view) where you can easily skip along much faster. also there is the option to go for certain pins and connections that are somewhere in the middle of the board by just connecting them with an extra measurement wire clip - letting the x-y axis system follow the trace in a smart way, giving something like a "flash" like direct trace reconstruciton, including even forks. Just make sure your probe leaves enough space to the board so that none of the boards components or any of the hand wired patching cables will ever get any damage. BUT: if out of a sudden, maybe triggered by your video presentation, someone pops up having a bunch of more schematics, pin out listings and similar in his hands - will that maybe obsolete the whole RE subject and kick you straight forward into recreating the machine - with all sorts of deviation analysis and also fixing broken things that a regular re-activation would bring with?
One exception to the "one output drives a line" is if the chips in use are "open collector." This type of chip wasn't used for very long and isn't used at all anymore as far as i know. But it allowed you to "wire or" outputs together, because there was an external collector resistor so the outputs didn't fight each other. Not uncommon in the 60's and 70's, because tri-state outputs either weren't invented yet or weren't popular yet. So check the chip ID to find out if it's an "open collector" chip or not.
What about making a "dual X-Y plotter" that can measure what pins are connected to what pins ? 1) Make a map of all connectors and output pins on the board. The possible signal sources 2) Let one probe be stationary on a source, while scanning with the "starter-cable" probe in a zigzag motion over the backside of the board. 3) repeat for all sources. Then there are a coarse map of connections. 4) Refine the map for each sources by using a spring probe on the pins in the coarse map.
Eric came online, and an Amiga 1000, 3000, 4000T (and some other models) sitting in the background. And me the Amiga guy be like "you had my curiosity, but now you have my attention".
I hate to say it, but the easiest way is to remove all the components off the board and go through every pin and via with a continuity tester. Great chat to listen to.
Big thanks for these definitely great lesson on RE in such a special field. No idea if i will ever get in need again of such things, but knowledge never ages. And of course these book seems to be a photographic and content wise marble - that i even have some guess i want to go for looking into it to get stunned. (y)
Are tristate output pins not a thing anymore? Eric explains (19:30-20:00) that it is bad practice - but how would you avoid having several chips using the same (data/address) channels?
@@davidthibodeau753 bus systems are designed to that. and solving a bus is less of an issue when you have the basic signal clues. - thus the statement was made for any *other* logic on such a board.
@@alexanderstohr4198I'm a bit of a novice on these matters. How is a bus designed to handle multiple outputs?Regarding other nets or logic with multiple outputs, one example is the IRQ pin on the 6502 which could be connected to multiple open drain outputs
I've had a few things recently that I've partially reverse-engineered to figure out how they work. One of them I have extra boards that I can desolder parts from, so it may be a good for trying out that new KiCad stuff. The battery cable brush is clearly so much better than trying to drag a mulitmeter lead down rows of chips! I think this alone will help me a lot.
What about a 'divide and conquer' approach? If most of the connections in the board are local (to the same IC or nearby ICs), and the board is divided in sections, of say, 3" by 3". Each section can be reverse engineered, and the 'external' connections for that section can be left for later.
Is anyone else getting cold sweats looking at those shelves behind Eric? They look like they could collapse at any moment. I know it's probably a trick of the lens, but still.
Brilliant fellow, this Eric. He's certainly on another level from my lazy ass. The task appears monumental but you've completed equally monumental tasks before. I have full conf-oooh kitty! 🐈❤
I have two TRW chips .. but those if I remember correctly was used In a video editor of some kind, and that used the same type of boards and backplane as your cards.
for whatever reason - i feel like i either never heard about MCGA (because even standard compendium literature skips it due to lack of information?) - or just forgot about it as it not relevant to general computer users and coders. MDA, CGA, EGA, Hercules and of course VGA was the category i remember quite well (up to their relevancy degree). - maybe i will come across that in some sort by intention or by accident. (I also forgot about the Vectron game at some point - and re-discovered it on the internet, even if now can surely tell to have seen it in warehouses on display and in catalogs for maybe some 1 year until it was gone. decision: its not versatile and also does not cope with the home color TV - even if its definitely cool line graphics in contrast to pixelated fonts. today i would say: the concept barely scales and it would be a mess with digital video like youtube.)
I would suggest to design a bed of nails to all the 3000 pins from the bottom of the board and run it via an ICT to derive the netlist automatically and import it into EDA. The tester itself could be DIYed as easy as a huge shift register a bunch of resistor arrays and an arduino...
"How hard can it be?" Possibly the most famous of famous last words after "Hold my beer!" I wish you good fortune. I do hope for your sake somebody watching this video knows somebody who knows where a complete one of these might be stashed that you can crib from... what kind of companies / institutions had these? If any universities bought them it may be possible somebody still has one in a cupboard somewhere. Of course excellent advice. FWLIW, just in case it's helpful: When I'm doing this my workflow for the schematic tends to be: 1) I try to lay out the IC's, connectors, and passives on the schematic much as they are on the physical board because that both helps keep track of where I am and the board is likely to have been laid out reasonably efficiently for connections - less of a rats-nets in the schematic. At the very least remember to give every IC it's own sensible name that alludes to it's (likely) function on the schematic! 2) My schematics rarely use individual gate symbols. I prefer to use footprints for the IC's the gates come in as that's how the physical board is. I can always come back and change this at the end if doing so would make a more understandable result. 3) I then fill in the power and grounds, along with their associated passives. Depending on how complicated the board is I may then move all the associated passives to their own block on the schematic to make it more readable. 4) Then I try to fill in the clock(s), then all the data and address lines, as these tend to be the bulk of the connections and once you get going it usually becomes clear how the designer did them which helps enormously. 5) Then comes the hard work - the remaining 10-30% of the connections that constitute how the board functions. Because there's every chance you won't understand these until the schematic is complete it's really, really easy to mess these up! check , check, and check again. 6) Once it done, be paranoid and recheck everything. then consider doing a tidying pass to make the schematic more readable. But for your own sanity I'd advise keeping the components largely as they are on the board - it really helps with checking and bug-finding. 7) Just my preference, and laziness! I use sensible labels for my connections rather than drawing them in if I possibly can! It really helps to keep things understandable and to avoid rats-nests of overlapping lines as the reverse-engineering goes on. If you build up the schematic pretty much in order of power, clock, data and address lines, then everything else, you don't usually run in to having to relabel too many instances because you gave them stupid or unhelpful names though lack of understanding - it's really important not to use arbitrary names for your labels even if you don't know what they do! If nothing else, use the schematic name of an IC they run to / from as part of the label. The final connections will then have room to be drawn as 'wires' if labelling them is either just stupid or you otherwise don't really know what they do. IMO: Doing it this way will help to preserve your sanity and result in a schematic that actually has a hope of working. Better yet, you tend to end up with all the 'generic' stuff you don't really care about as labelled connections that are easy enough to follow if you read them - even better a missing label on a bus will stick out like a sore thumb! The most important connections are highlighted for being 'wired' together in a fashion that hopefully indicates function, aiding understanding and readability. Also if your schematic takes more-or-less the form of the original PCB it really helps navigation from one to the other - of course some fiddling may be required if doing so proves more important for readability, but most people tend to lay their PCBs out with the same logic they put in to their schematic so this is rarely necessary. PS: I know lots of people like to add 'bus connections' to their schematics to aid readability. Each to their own, but I don't usually bother unless there is a very good reason as I find the approach of sensibly labelling everything is enough. Software? I'm an Eagle guy because when I learned this stuff Eagle was really the only sensible option... even though it's an utter sod to use because of terrible UI design. If I was learning today I'd probably use KiCad as it seems a little less 'nasty' and all the 'cool kids' are using it. Some day I'll probably make the leap as it's getting increasingly annoying converting useful Kicad schematics to Eagle by hand as neither package has useful import/export functions for the other! *sigh* Enough rambling. I hope that was slightly useful to someone - I shall certainly start using the battery cable brush technique!
I wonder whether a professional (but, sadly, expensive) CAD tool could make it a lot easier. E.g. by translating changes made on the layout back into schematic? Considering the time saved and the more enjoyable experience, it might just be worth the money paid? Or better yet if the tool manufacturer provides a free copy to the cause like Keysight did.
that´s why i still use an old Protel copy. you can always be sure schematics and layout stay 1:1, and you can either work in schem or Layout and the other being updated by the IDE.
@ 13:20 you can back-annotate between the PCB editor and the Schematic editor, in order to create a schematic from a board layout - any reason this is not being used?
Keep in mind what your goal is: create a backplane and connect the FPS-100 to the PDP-11. For that you need the functionality of the bits in the edge connector. I’m not sure you need to fully reverse engineer the full board. You may end up with a complete schematic of the board, but that is a side effect of reaching your goal.
why yes, yes it is! it's a whole story, it took over a year to fix it, requiring recapping and repair of dozens of vias that had been etched through by capacitor juice.
@@TubeTimeUS Also i encoutered an A1000 with its floppies, A double floppy A3000, a PET /80xx an A500....do you happen to have one of these rare tripple A boards..? ;)
@nalinux Whilst the risk is reduced, it's not eliminated. Given that these boards are old and many of the components could be very difficult to source, it's worth taking precautions at all times. If some of these devices are PALs and they have their security fuse blown, then they will be impossible to replace.
@@iggysfriend4431 IMHO, those old cards use mainly bipolar componants, not CMOS. And once again there are very few chances to destroy a soldered chips. I destroyed just once, not soldered, in 1992. A TDA 15xx amplifier. It never happened to me again since. I still don't use any antistatic device :) And I don't know anyone destroying a graphic card or anything else while plugging it in a computer.
Hey usagi! All of this talk reminded me of a reverse engineering project I've wanted to do on my own, and I was wondering if you knew of any good places to archive schematics or boardviews(If I ever get around to it).
![How the Apple ][ Works!](/img/1.gif)
One of the best RUclips channels of modern time no stupid 2-3 minutes of un-related intros. No many minutes of sponsorships for random crap. Usagi Electric is awesome hope this channel keeps making this kind of awesome content for a long time to come
Sponsors are ok if it's related to the video like (PCB way, jlcpcb).
Obviously the useless long intro are useless.
This is how YT should be. Highly informative and something you never ever would see on commercial TV. There are others like curiousmarc. I really enjoy how Usagi Electric takes us along for the journey. YT itself is in a terrible state, unwatchable without preventive measures. I hope I will able to see this series to completion before I have to abandon RUclips for good, and hope, if it ever happens, there will be a backup to still follow along. Very good content en very enjoyable you letting us watch it all.
@pe1dnnMy biggest frustration right now is the ads! It's becoming completely unwatchable. YT might as well be renamed to AdTube.
Yeah, the only problem is RUclips itself
I have a backplane. When i get home ill look for the specific numbers and check back later
The battery cable idea is genius!
an x-ray will clearly show inner layers. PCB x-ray machines are easily found at pcb assembly houses where they are used for solder inspection
We're finally getting one at my workplace, PCB reverse engineering is going to be so much better
One thing I'd point out with schematics is that it's far more readable to have inputs on the left and outputs on the right, as much as possible. When I started reversing something, I'd use the largest page size that KiCad supported so that things can be spread out and then cleaned up as interconnects begin to make sense. If you've ever looked at the schematics that IBM published for their PC 5150 or XT 5160, you'll see some clean design: Inputs arrive on the left of the page, the signal flow goes (mostly) left to right, and outputs leave on the right side of the page.
Also, for long runs, a tone generator/wire tracer duo has some potential to at least help you find the general area that a trace is heading for.
Unleash your inner Ken Shirriff!
Ken Sherriff is another epic reverse engineerer!
All hail Ken!
Ken is awesome! He also has a great blog. In fact, he is working on a lot more projects than those visible on CuriousMarc's channel.
My reverse engineering experience is limited and a lifetime ago. One particularly challenging problem was a bit-slice processor board for a fighter aircraft's radar. New boards worked fine when installed in the aircraft. But on our test bench, we would connect a console that was tied to all the data & address lines in the CPU to allow us to read and write to the memory. When the console was connected, the CPU would randomly reset. It was an edge case: some boards would never reset. Others would run for hours before resetting. I spent weeks with a logic analyzer trying to isolate the issue.
We had the schematics, but the 6 or 8 layer PCBs were outsourced and we couldn't easily get our hands on the layout. And once we got the PCB layout, it didn't really help in finding such a rarely occurring issue. After weeks of trying we finally found the problem. To account for a part change, the board had been re-laid out by the vendor. Of the many changes to the traces, one turned out to be the problem. One of the databus traces lines connected two pins that were only about an inch apart. But the trace was routed all the way across the board where it made a u-turn around a single pin then all the way back across the board. The pin it looped around was (you guessed it) RESET. When the console cable & console were connected, the added inductance was just enough to cause the reset to get triggered once in a great while. A simple mod to isolate the trace and use a short soldered jumper wire between the two pins solved the problem for good.
Sounds like very bad design on the part of the vendor. They should have known better!
to me that sounds like a total no-go for a military design. but as you are talking about it, i have to believe its really true.
some "student" had done a design, no one did look after it, no one did a review, and finally no one did any in deep testing or simulation.
you indicated it was a long time ago - maybe when there were not so much simulations and EMC test facilities around to make sure that anything is mostly sane.
I have seen stuff like that on PCBs. When you go to add a trace all of the obvious paths are taken up. If you are not willing to shift traces to make room, you get long runs.
Eric has a Bunch of Amigas in the Background, must be a good guy! 😆
I really like when channels like this take a few minutes to pause their projects and talk to all the people involved. This was fantastic. I have TubeTime's book and have built some of his recreations. Awesome convo.
Those shelves behind Eric need a pay rise. They are doing some serious heavy lifting overtime! (Did pause to look at all the goodies!)
Someone somewhere must have a schematic for that PCB, there's going to be some long forgotten bits of paper lurking in a dusty file drawer somewhere!
I've done quite a bit of reverse engineering for work, but for software instead of hardware and I learned here that there are some interesting philosophical similarities with hardware reverse engineering. I've had tasks where it's basically "Here's this black box, make one just like it but with different hardware and system software" and often I had little or no documentation or even any software source. I would have to probe around on the inputs and outputs and figure out what the heck it was up to. Really interesting and different video this week for my usual Sunday morning coffee tradition.
Another wonderfully informative video. Great to see people working together to solve problems in retro-tech. Thanks again!
This is one of the most fascinating interviews I have ever seen. To Eric I hereby award the designation of d'Apollo, to be added to his name, such as PhD would be added.
I've had "Open Circuits" on my shopping list for a while now...... just clicked the button to buy it.
A book on the Centurion would be excellent - you already have a customer! 🤓👍
I've recently been messing around with '70s era TTL ICs building some really basic circuits, seeing a complete system built from this tech is really interesting to me!
I'd suggest attempting a similar conversation with another Curious Marc colleague, known there most often as Master Ken. He has reverse engineered individual chips, electromechanical beasts, and even more marvelous things.
It was nice to see someone aware of the camera location and talking direct to the viewer and not looking elsewhere when speaking (to us).
In the early 1980's I worked for CAMBION, the Cambridge Thermionics company, in Pittsfield NH where we did the metal stamping and screw machine production of pins and standoffs as well as the molding of the IC sockets. At our Cambridge facility we did automated backplane wire wrapping where we passed the pin location and a cut/continue code.
Could be a fun exercise to drive a 3D controlled wire wrap tool!
i guess he might rather want to go for a PCB with traces - but the traces density could be too high, and the signal integrity might be in danger. furthermore patching such a board in the case of an error can be a horror up to non-solveable.
good luck to him - and indeed such an automated solution could be a very valueable time saver.
In 1982 a friend reverse engineered the IBM PC motherboard and CGA board. He found that putting a drop of water on the board would allow him to see the inner layers. So he would trace them by slowly pushing the drop around with his finger.
The battery cable wire trick is an awesome idea.
From my little experience doing this sort of thing:
1) Go get the datasheet and application notes for any complex chip. You are likely to find that the circuit you are working on looks a lot like what is in the application note. Once you have found that section of circuits, you can kind of draw a box around it and treat it like a module in your thinking about the rest of the board.
2) Although no rule says the pins of a buffer chip have to be used in order, you will often find that a bus goes to, lets say, an 8 bit buffer using the gates in the order on the datasheet. If not try the reverse order.
3) Verifying the power supply connections on all of the chips can get you quickly past the question of whether this thing has multiple supply voltages. This only applies to things that might have that for some reason.
4) Chip placement on a PCB often follows the placement on the schematic but it may be rotated or mirrored
5) Multiple monitors on your PC can help a lot because you can have more stuff in view
I wish you the best of luck. Excellent insight to a fascinating world. Ty. 👍
Stop reading comments already! Go get "Open Circuits" right now, seriously fascinating exploration of components at microscopic level. Beautifully photographed with very approachable explanations. I've had the pleasure of working with Eric for a couple of years and he is hands down one of the most brilliant engineers and nicest people I know. Eric, I want my copy signed.... Usagi, this looks like a super cool project, best of luck! I can't wait to see where it goes.
thanks for the kind words! drop me an email. :)
And it is back to #1 best seller in the engineering section. Mine arrives tomorrow :)
@@TubeTimeUSI just subscribed to your channel. 🙂 I can't believe after all the videos I've seen of you working with Curious Marc, I hadn't been to your channel yet!
Someone send this man an ESD mat! It's winter and the air is dry.
A useful tool is a TDR rig - Time Domain Reflectometer. You can measure the length (in time) of a trace and whether it has branches by looking at the scope. You can also touch a via with a metal probe and see that change in the impedance on the display if it's connected to the trace.
Staying motivated: Treat it like a squirrel gathering nuts for winter. The squirrels not overwhelmed or discouraged by the size of the task because they're working on one acorn at a time. Forget the big problem; break it down into the smallest achievable goals you can. Concentrate on getting those small goals done and the rest will follow. This mindset has been the *only* way I've managed to power through some of the larger projects in my career. I apply it regularly when programming or reverse engineering legacy code, but it works for just about anything.
Did I ever talk to you about how I reverse-engineered all the boards for the Entrex/Nixdorf Trapezoid Terminal? Or a "Mystery" Data General Nova-compatible board? We should compare notes on this! You've done, yet again, an EPIC job on this video!!!!
It should be a great one year vídeo series, you both working together since taking PCB photos untill the complete schematics
So nice to see two of my favourite people collaborating.
Shine on you crazy diamonds.
And, with ALL of my rambly comments, I must emphasize, Eric aka TubeTime has been one of my major inspirations for YEARS! And I LOVE that we all get to chat with him on a regular basis... Looking forward to our next discussion with him as a follow-up to this video!
👍
When will you start posting videos again?
Even if it’s a four or six layer PCB, I think Usagi’s old PCBs are made where there are no buried vias.
This means all vias go through the PCB. It also means no trace in the inner layers isn’t connected to a via on both sides of the PCB.
Knowing this, you can ohm out every inner trace… eventually.
It gets complicated for vias hidden by ICs.
And yet, it's no problem after all with everything being through hole mounted...
are you talking about the board having nothing like the things called "burried vias" - an item that will be in place since maybe short after 2000s?
to my understanding the inner layers are first etched and then they will se application of vias. after that the outer layers are glued upon and the vias for them are added - with some doing as well giving contact to not only the outer but also some of the inner layers...
i think it went popular when BGA and other dens grid package interfaces went into the industry. so folks could go for power and ground with just a single "drill hole". and at the same time the space for the data and control traces was a bit reliefed from pressure. also a reason why a lot of chip have ground pins in the center.
(by the way, the GPU in the image had those interconnect metal layers areas with vertical traces on one layer and the horizontal traces on the other layer. so your chances as a designer to run out of space or have unexpected interactions have noticeably gone better during your overall design procedure - giving your better chances to solve the design riddle.)
Thanks for Eric's insights! Much appreciated. Feels like The Amp Hour but with video, haha! It's a good thing. You could get in touch with Ken Shirriff (the one who works with CuriousMarc) - his insights will certainly help a lot, he's a genius in his own right after all.
I agree, KiCad really could use a reverse-engineering feature! Truth be told, I don't know of any software that can do that by now, but that would make sense for dual layer boards. Not all that useful for multi-layer, though. And oh, I do get confused with the spaghetti mess a lot too.
I wouldn't rely on a KiCad 3.0 tutorial, definitely use something newer as the software has changed a lot especially since 6.0, and we're at 8.0 now.
Ha! I love that book, it moved me deeply when I took a first look at it and I made a review of it, which turned out to be the single best performing video on my channel: ruclips.net/video/Mqo_sgsdTRU/видео.html - take a look and grab the book, it's absolutely worth it! A thing of beauty, a joy for ever.
but yes, I know a software that can do PCB reengineering: Target3001! from the company friedrichs in germany
17:15 YES...I've used this procedure many times! Again, absolutely BRILLIANT idea! Oh, and you did EXCELLENT B-roll for that, too!
❤
How do you eat an elephant. One bite at a time.
REing a board like this is a lot, but you just take it on piece at a time.
19:50 He says you will never have two output pins connected together, I want to specify that he is not (or at least shouldn't be) referring to data bus lines nor tri-state logic circuits. Example: Chip A output, Chip B output, and Chip C input are all tied together on one node/net/connection that is referred to as "DATA". Either Chip A is outputting and Chip B output is floating, Chip B is outputting and Chip A is floating, or Chip A and B outputs are floating. You will typically see this with Digital circuits, and you should typically be able to tell based on the chip.
Yes, and also open-drain or open collector circuits can often be part of a large "wire or" circuit.
Also with 'wired-or' open collector outputs.
@@TheVirtualWatcher .. and in a few cases things coming off of what really are the emitters of transistors. Some analog window detector circuits work like that. Multiple LM311s can be wired together like that sometimes.
Step 1 assemble a mini computer. Check. Step 2 repair a vacuum tube computer. Check. Step 3 build a vacuum tube computer. Check. Step 4 do the impossible... he's working on it.
David: “How hard can it be?” - You are freaking hysterical!
Those exact words have gotten me into more trouble than I care to admit. Repeatedly.
RichRebuilds on RUclips has a sign in his shop: "We do not do things because they are easy, we do them because we thought they would be easy."
I have always wanted to go to a VCF. The east one is in NJ - no one wants to go to NJ. However, I often visit my family in Texas in April... But wait... Why not go at the end of June and go to VCF SW? Why not, indeed! So I rearranged my trip so I can go!
Those pictures of the isolation amplifier internals would make great wallpapers and posters and I would love to hang that on my walls - that bond-wire transformer is just beautiful :o
Thanks for the video Eric is a good one to reference to. Good luck on the reverse engineering of the boards.
Great video, thanks!
Worth remembering that the copper for inner layers is normally thinner than that for outer layers. It would be interesting trying the brightest illumination you can find (500W spotlight) to illuminate the back or front of the board and then use a digital camera to photograph the other side. Do it for both sides. the digital image can be manipulated to show more detail than you will ever see with Mk 1 eyeball, and might mitigate some of the issues of not being able to remove the ICs.
even the best LED light does a lot of heat. thats not good for such an old times PCB.
Brilliant, you are both brilliant.
The Kikad thing, the wire brush...
Kicad
@kensmith5694 woops! Thank you.
Eric is always so darn positive (and one of my favorite guys on Marc's channel...well, they all are of course!).
Hi,
i did some RevEng myself when i was in the R&D biz. I/we also used an old Xray machine that came from a security checkpoint. It had make things a lot easier ;) also a bright light helped a lot and even we desoldered a board completely and put it on a modified copymachine which alowed us to brighten up the light and while the top was heaviely over exposed the inner traces had been nicely visible on the copy.
And if you have some scrap boards you can burn out the inner traces and see where they conected by simply burn them down and see the damage. Also you can use a modified microwave oven, where you can switch the magnetron on/off with a dedicated switch, for a second and burn down the upper layers and peel them off afterwards leaving only the inner traces intact and lets you buzz them out a bit more easily. but these is only possible if you have some scrap boards as well.
cheers.
22:02 "symbols on the schematic with nothing connected to the pins". I have a different procedure where I create a preliminary net list based on what is already known about the chips, and then use that to track the changes on the PCB side, then use KiCad's feature to transfer the netlist back and forth between the Schematic and the PCB. Again, I'll show you!
Eric seems like a great guy. Thanks for the video!
Great interview and tips - ingenious, the brush! Thanks much! Regarding the rules of thumbs for re-engineering and "output -> input" schematics connections, I'd like to mention that there are (as always) exceptions to these rules. One exception would be if a developer intended to let current flow between OUTPUT = HIGH and OUTPUT = LOW pins, which is a very common use case for Microcontrollers if they are configured as PUSH/PULL. For example, if you intend to drive an LED (or LED Charlieplexing) with an ATmega MCU, you can't let current flow between an OUTPUT and INPUT pin. You can source current from an output, but not drain current with an input. Hence, to let current flow between GPIOs in PUSH/PULL config, you would need OTPUT = HIGH for the LED Anode, and OUTPUT = LOW for the LED Cathode, for example. So, indirect OUTPUT -> OUTPUT connections are a thing that you will see in practice.
Really great discussion! Reverse engineering of vintage boards is on my bucket-list - that trick of using of the copper brush is gold!
MAME is what came to my mind when I saw video title
The size of the task may be a bit daunting but the process is relatively simple.
Draw all the chips. Buzz out all the connections. As you discuss in the video, a lot of the connections are known, power and ground, and depending on the device function, the likely connections can be narrowed down.
At least if all the chips have their part numbers functional areas can be identified (some years ago I reverse engineered a board, somewhat smaller than yours, which had all the chip numbers removed).
Since you want to sort out your backplane, start with the edge connector. You may be able to determine sub-circuit function fairly rapidly.
Eric is always so positive!
Open Circuits is such a great book. It's the Modernist Cuisine of electronics books, when it comes to the cutaways.
It is definitely huge.
how about x-rays and especially using x-ray layer imaging? it will most likely be able to penetrate and unveil any burried traces not visible to the methodology you were speaking in the vid.
i personally could imaginate, that HF probing would also be a cool method to track down not only the burried traces but any traces. (done it with just power wires in walls and an old phone amplifier coil that had originally a rubber suction knob to tap phone speakers. i do quite well remember these humming noises and how they did modulate their intensity with distance. - similar to that there were old style large CAD graphical tablets for digitizing with mice like cross hair centers - their front was a simple coil in a PVC glass piece and the backside was a straight grid of wires that helped locating that mouce center to a noticeably well precision. Just an MCU and some serial port required to hook it into any major CAD program.)
something like an x-y axis system with a probe/sender on its tool handle (i have a cheap aluminium profile based china A3 laser model with maybe some options for alternate tools).
so if you go for an edge connector set... as the second pole in the game - you can drive such a probe/sender hat across the board with a resolution as tiny as your steppers will allow.
the edge connector might feed into a two-way "passive" CMOS transistor switch array and allow you to get one or more such external pins sample in a "divide the search space in halves" method. Lets assume you might be able to do one full edge connector scan (logical track down) per second. then you have 3600 such assignments per hour - and if its analog signal levels, its even more of worth. so depending on how sensitive such a setup might be... it can do maybe 100.000 or more such probings per weekend. - but i assume it will be even faste, because you have to expect lots of "blank" areas (from an edge connector view) where you can easily skip along much faster. also there is the option to go for certain pins and connections that are somewhere in the middle of the board by just connecting them with an extra measurement wire clip - letting the x-y axis system follow the trace in a smart way, giving something like a "flash" like direct trace reconstruciton, including even forks. Just make sure your probe leaves enough space to the board so that none of the boards components or any of the hand wired patching cables will ever get any damage.
BUT:
if out of a sudden, maybe triggered by your video presentation, someone pops up having a bunch of more schematics, pin out listings and similar in his hands - will that maybe obsolete the whole RE subject and kick you straight forward into recreating the machine - with all sorts of deviation analysis and also fixing broken things that a regular re-activation would bring with?
This is fascinating - thank you!
One exception to the "one output drives a line" is if the chips in use are "open collector." This type of chip wasn't used for very long and isn't used at all anymore as far as i know. But it allowed you to "wire or" outputs together, because there was an external collector resistor so the outputs didn't fight each other. Not uncommon in the 60's and 70's, because tri-state outputs either weren't invented yet or weren't popular yet. So check the chip ID to find out if it's an "open collector" chip or not.
Tube Time sharing his secrets for successful reverse engineering.
What about making a "dual X-Y plotter" that can measure what pins are connected to what pins ?
1) Make a map of all connectors and output pins on the board. The possible signal sources
2) Let one probe be stationary on a source, while scanning with the "starter-cable" probe in a zigzag motion over the backside of the board.
3) repeat for all sources.
Then there are a coarse map of connections.
4) Refine the map for each sources by using a spring probe on the pins in the coarse map.
Eric came online, and an Amiga 1000, 3000, 4000T (and some other models) sitting in the background. And me the Amiga guy be like "you had my curiosity, but now you have my attention".
I hate to say it, but the easiest way is to remove all the components off the board and go through every pin and via with a continuity tester. Great chat to listen to.
27:41 ahh, yes, the Unbreakable Kimmy Schmidt method. That's how I approached running training for a 5k.
Before I retired, we successfully use a CT scan to get good images of internal layers. I would start there for the hidden lawyers.
It looks like the Australian Computer Museum Society had one of these boards. Maybe they have some information for it.
Big thanks for these definitely great lesson on RE in such a special field. No idea if i will ever get in need again of such things, but knowledge never ages.
And of course these book seems to be a photographic and content wise marble - that i even have some guess i want to go for looking into it to get stunned. (y)
You might see two outputs connected together that are open collector - often used on buses, right?
Are tristate output pins not a thing anymore? Eric explains (19:30-20:00) that it is bad practice - but how would you avoid having several chips using the same (data/address) channels?
I was wondering the same thing. I have multiple data registers outputting to the same internal data bus of my homebrew 6502 cpu. Seems to work fine
@@davidthibodeau753 I also don't see any problems with it - as long as you make sure only on thing is controlling the "bus" at the same time.
sometimes you see even bad practice on real world equipment.
@@davidthibodeau753 bus systems are designed to that. and solving a bus is less of an issue when you have the basic signal clues. - thus the statement was made for any *other* logic on such a board.
@@alexanderstohr4198I'm a bit of a novice on these matters. How is a bus designed to handle multiple outputs?Regarding other nets or logic with multiple outputs, one example is the IRQ pin on the 6502 which could be connected to multiple open drain outputs
Cant wait to buy that book!
Oh my god! I absolutely loved these tips!!! 🎉❤😊
I've had a few things recently that I've partially reverse-engineered to figure out how they work. One of them I have extra boards that I can desolder parts from, so it may be a good for trying out that new KiCad stuff.
The battery cable brush is clearly so much better than trying to drag a mulitmeter lead down rows of chips! I think this alone will help me a lot.
Ohh dude! Didn't realize he is tubetime on the socials. :) That's awesome.
I also use the battery cable trick, only i use a very soft silicone coated wire, because it has a lot more wires inside and they are very thin
yup, this is the best kind of wire for the trick.
Just bought the book, it looks fascinating.
Very good presentation.
"Youre not going to see two outputs connected together" apart from any kind of bus.
Holding up to show the boards ... I hope you took ESD precaution measures.
What about a 'divide and conquer' approach? If most of the connections in the board are local (to the same IC or nearby ICs), and the board is divided in sections, of say, 3" by 3". Each section can be reverse engineered, and the 'external' connections for that section can be left for later.
This is an awesome upload.
I’m no where near this kind of ability.
My first thought is that a CT scan would let you see the internal traces easily, you might even get to see inside the ICs
Is anyone else getting cold sweats looking at those shelves behind Eric? They look like they could collapse at any moment. I know it's probably a trick of the lens, but still.
they're quite sturdy. they're screwed to the wall and have earthquake straps across the front that i took down for this video. (they're back in place)
Brilliant fellow, this Eric. He's certainly on another level from my lazy ass. The task appears monumental but you've completed equally monumental tasks before. I have full conf-oooh kitty! 🐈❤
24:50 Organic and personalized process...Yes, AMEN!!!
classical artisanal process. you listen and react to the material you're working with
I have two TRW chips .. but those if I remember correctly was used In a video editor of some kind, and that used the same type of boards and backplane as your cards.
I remember the mcga chip it also came inside the apriocot pc with MCA and cool security remote. it also had a strange mode $13 setup.
for whatever reason - i feel like i either never heard about MCGA (because even standard compendium literature skips it due to lack of information?) - or just forgot about it as it not relevant to general computer users and coders. MDA, CGA, EGA, Hercules and of course VGA was the category i remember quite well (up to their relevancy degree). - maybe i will come across that in some sort by intention or by accident.
(I also forgot about the Vectron game at some point - and re-discovered it on the internet, even if now can surely tell to have seen it in warehouses on display and in catalogs for maybe some 1 year until it was gone. decision: its not versatile and also does not cope with the home color TV - even if its definitely cool line graphics in contrast to pixelated fonts. today i would say: the concept barely scales and it would be a mess with digital video like youtube.)
I would suggest to design a bed of nails to all the 3000 pins from the bottom of the board and run it via an ICT to derive the netlist automatically and import it into EDA.
The tester itself could be DIYed as easy as a huge shift register a bunch of resistor arrays and an arduino...
Back in the day, the Digital DR11C was the general-purpose interface for UNIBUS PDP-11 systems. Bitsavers has a manual for it.
"How hard can it be?" Possibly the most famous of famous last words after "Hold my beer!"
I wish you good fortune. I do hope for your sake somebody watching this video knows somebody who knows where a complete one of these might be stashed that you can crib from... what kind of companies / institutions had these? If any universities bought them it may be possible somebody still has one in a cupboard somewhere.
Of course excellent advice. FWLIW, just in case it's helpful: When I'm doing this my workflow for the schematic tends to be:
1) I try to lay out the IC's, connectors, and passives on the schematic much as they are on the physical board because that both helps keep track of where I am and the board is likely to have been laid out reasonably efficiently for connections - less of a rats-nets in the schematic. At the very least remember to give every IC it's own sensible name that alludes to it's (likely) function on the schematic!
2) My schematics rarely use individual gate symbols. I prefer to use footprints for the IC's the gates come in as that's how the physical board is. I can always come back and change this at the end if doing so would make a more understandable result.
3) I then fill in the power and grounds, along with their associated passives. Depending on how complicated the board is I may then move all the associated passives to their own block on the schematic to make it more readable.
4) Then I try to fill in the clock(s), then all the data and address lines, as these tend to be the bulk of the connections and once you get going it usually becomes clear how the designer did them which helps enormously.
5) Then comes the hard work - the remaining 10-30% of the connections that constitute how the board functions. Because there's every chance you won't understand these until the schematic is complete it's really, really easy to mess these up! check , check, and check again.
6) Once it done, be paranoid and recheck everything. then consider doing a tidying pass to make the schematic more readable. But for your own sanity I'd advise keeping the components largely as they are on the board - it really helps with checking and bug-finding.
7) Just my preference, and laziness! I use sensible labels for my connections rather than drawing them in if I possibly can! It really helps to keep things understandable and to avoid rats-nests of overlapping lines as the reverse-engineering goes on. If you build up the schematic pretty much in order of power, clock, data and address lines, then everything else, you don't usually run in to having to relabel too many instances because you gave them stupid or unhelpful names though lack of understanding - it's really important not to use arbitrary names for your labels even if you don't know what they do! If nothing else, use the schematic name of an IC they run to / from as part of the label.
The final connections will then have room to be drawn as 'wires' if labelling them is either just stupid or you otherwise don't really know what they do.
IMO: Doing it this way will help to preserve your sanity and result in a schematic that actually has a hope of working. Better yet, you tend to end up with all the 'generic' stuff you don't really care about as labelled connections that are easy enough to follow if you read them - even better a missing label on a bus will stick out like a sore thumb!
The most important connections are highlighted for being 'wired' together in a fashion that hopefully indicates function, aiding understanding and readability. Also if your schematic takes more-or-less the form of the original PCB it really helps navigation from one to the other - of course some fiddling may be required if doing so proves more important for readability, but most people tend to lay their PCBs out with the same logic they put in to their schematic so this is rarely necessary.
PS: I know lots of people like to add 'bus connections' to their schematics to aid readability. Each to their own, but I don't usually bother unless there is a very good reason as I find the approach of sensibly labelling everything is enough.
Software? I'm an Eagle guy because when I learned this stuff Eagle was really the only sensible option... even though it's an utter sod to use because of terrible UI design. If I was learning today I'd probably use KiCad as it seems a little less 'nasty' and all the 'cool kids' are using it. Some day I'll probably make the leap as it's getting increasingly annoying converting useful Kicad schematics to Eagle by hand as neither package has useful import/export functions for the other! *sigh*
Enough rambling. I hope that was slightly useful to someone - I shall certainly start using the battery cable brush technique!
I want that beautiful book! Wow!
Such an interesting video. You have to put in the legwork to get’r dun.
I wonder whether a professional (but, sadly, expensive) CAD tool could make it a lot easier. E.g. by translating changes made on the layout back into schematic? Considering the time saved and the more enjoyable experience, it might just be worth the money paid?
Or better yet if the tool manufacturer provides a free copy to the cause like Keysight did.
that´s why i still use an old Protel copy. you can always be sure schematics and layout stay 1:1, and you can either work in schem or Layout and the other being updated by the IDE.
Gate array, or Gatorade? 🤣
You, sir, are a brave man.
That's a wholesome people right there.
there must be one of these units in a computer museum somewhere that you can take a look at?
I am so buying that book
This vid was awesome..... 🤩
Couldn’t multi model (vision capable) LLM’s help with some of this tedium of reverse engineering?
@ 13:20 you can back-annotate between the PCB editor and the Schematic editor, in order to create a schematic from a board layout - any reason this is not being used?
last time i tried i couldn't get it to work. but maybe it's worth another try, especially with the newest version.
Keep in mind what your goal is: create a backplane and connect the FPS-100 to the PDP-11. For that you need the functionality of the bits in the edge connector. I’m not sure you need to fully reverse engineer the full board. You may end up with a complete schematic of the board, but that is a side effect of reaching your goal.
Is that an A4000T I see beside your right shoulder, Eric?
why yes, yes it is! it's a whole story, it took over a year to fix it, requiring recapping and repair of dozens of vias that had been etched through by capacitor juice.
@@TubeTimeUS Also i encoutered an A1000 with its floppies, A double floppy A3000, a PET /80xx an A500....do you happen to have one of these rare tripple A boards..? ;)
Please use some static control measures when handling any boards.
No real problem when componants are soldered on a board.
@nalinux Whilst the risk is reduced, it's not eliminated. Given that these boards are old and many of the components could be very difficult to source, it's worth taking precautions at all times. If some of these devices are PALs and they have their security fuse blown, then they will be impossible to replace.
@@iggysfriend4431 IMHO, those old cards use mainly bipolar componants, not CMOS.
And once again there are very few chances to destroy a soldered chips.
I destroyed just once, not soldered, in 1992. A TDA 15xx amplifier.
It never happened to me again since.
I still don't use any antistatic device :)
And I don't know anyone destroying a graphic card or anything else while plugging it in a computer.
You may want to use an x-ray to view the internal layers of the board.
Hey usagi! All of this talk reminded me of a reverse engineering project I've wanted to do on my own, and I was wondering if you knew of any good places to archive schematics or boardviews(If I ever get around to it).