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thanks ma'am. from nepal
Thanku dear
Thank you was lot of help for.my exam
Most welcome keep watching
Thanks
You are best mam
Thanks dear
Can't we do MOD-7 asynchronous up counter in the same process of how we did MOD-7 synchronous up counter and just change the circuit diagram a little bit?
Please check ruclips.net/video/LF_Ll_EFl00/видео.html
Mam can we draw using T flipflop same process using NAND gate
Yes
Mam JK flip flop ka truth table dena jaruri hain?
Nahi wo maine just explain kiya hai in designing of Asynchronous counter not required
Actually there is a mistake ,the nand gate must be connected to Q0 bar
Why
Sorry for inconvenience , its actually correct only mamThanks for the video
Mam aap na k map ka help kyu nahi liya hai jk ka input ka liya
Asynchronous mai input of jk flip flop always connected with high logic or vcc
@@TechnoTutorials2783 Thanks mam
thanks ma'am. from nepal
Thanku dear
Thank you was lot of help for.my exam
Most welcome keep watching
Thanks
You are best mam
Thanks dear
Can't we do MOD-7 asynchronous up counter in the same process of how we did MOD-7 synchronous up counter and just change the circuit diagram a little bit?
Please check
ruclips.net/video/LF_Ll_EFl00/видео.html
Mam can we draw using T flipflop same process using NAND gate
Yes
Mam JK flip flop ka truth table dena jaruri hain?
Nahi wo maine just explain kiya hai in designing of Asynchronous counter not required
Actually there is a mistake ,the nand gate must be connected to Q0 bar
Why
Sorry for inconvenience , its actually correct only mam
Thanks for the video
Mam aap na k map ka help kyu nahi liya hai jk ka input ka liya
Asynchronous mai input of jk flip flop always connected with high logic or vcc
@@TechnoTutorials2783 Thanks mam