SystemVerilog Interfaces in Hindi | #6 | SystemVerilog in Hindi | VLSI POINT

[@sunnykvofm]

please upload one small project like counter or adder and create sv test bench please?
if you have study material related to that please tell

[@shaikfaheed7353]

The vlsi verification field Is becoming vast now mam .. can u share the protocol knowledge or the RAL concept .Pcie, ethernet environment development,AHB2APB interface bridge

[@vlsipoint]

sure, will start the protocol playlist soon