The Multiplexer | Mux | CST203/ECT203/ITT203/EET206 | Logic System Design/ Digital Electronics | KTU

Syllabus Common to :
APJ ABDUL KALAM TECHNOLOGICAL UNIVERSITY (KTU)
(REGULATION 2019)
1)CST203 Logic System Design ( COMPUTER SCIENCE ENGINEERING)
2)ECT203 Logic Circuit Design (ELECTRONICS AND COMMUNICATION ENGINEERING)
3)EET206 Digital Electronics ( ELECTRICAL AND ELECTRONICS ENGINEERING)
4)ITT203 Logic System Design (INFORMATION TECHNOLOGY)
5)EBT205 Logic Circuit and Design (BIOMEDICAL ENGINEERING)
6)ICT203 Design of Logic Circuits (INSTRUMENTATION AND CONTROL ENGINEERING)
7)ECT203 Logic Circuit Design (APPLIED ELECTRONICS ENGINEERING)
(REGULATION 2015)
1)CS203 Switching Theory and Logic Design (COMPUTER SCIENCE ENGINEERING)
2)IT201 Logic System Design (INFORMATION TECHNOLOGY)
3)EC207 Logic Circuit Design (ELECTRONICS AND COMMUNICATION ENGINEERING)
4)EE204 Digital Electronics and Logic Design (ELECTRICAL AND ELECTRONICS ENGINEERING)
5)EC207 Logic Circuit Design (APPLIED ELECTRONICS ENGINEERING AND INSTRUMENTATION)
6)IC207 Design of Logic Circuit (BIOMEDICAL ENGINEERING)
COCHIN UNIVERSITY OF SCIENCE AND TECHNOLOGY
1) Master of Computer Applications (MCA)
20-381-0103 Digital Electronics and Computer Organization
2)EC-15-1304 Digital Electronics (BTECH ELECTRONICS AND COMMUNICATION ENGINEERING)
3)CS-14-1302 & 19-202-0302 Logic Design (BTECH COMPUTER SCIENCE ENGINEERING)
4)EE-15-1405 Digital Electronics ( ELECTRICAL AND ELECTRONICS ENGINEERING)
KERALA POLYTECHNIC DIPLOMA (SITTR KERALA)
1) 3042 DIGITAL ELECTRONICS ( DIPLOMA ELECTRONICS ENGINEERING)
2) 3042 DIGITAL ELECTRONICS ( DIPLOMA ELECTRONICS AND COMMUNICATION ENGINEERING)
ANNA UNIVERSITY ( REGULATION 2017)
1)EC8392 Digital Electronics (BE ELECTRONICS AND COMMUNICATION ENGINEERING)
2)EE8391 Digital Logic Circuits (BE ELECTRICAL AND ELECTRONICS ENGINEERING)
3)EE8351 Digital Logic Circuit (BE ELECTRONICS AND INSTRUMENTATION ENGINEERING)
4)CS8351 Digital Principles and System Design (BE COMPUTER SCIENCE ENGINEERING)
5)CS8351 Digital Principles and System Design (BE INFORMATION AND TECHNOLOGY)

[@ajilkk8598]

Best Malayalam digital electronics class I have heard on RUclips, great voice and so understandable class

[@Aj_An_]

Tnku 🎉

[@leviackerman3935]

Thank u sir,
Ithokke examin chodhich ezhuthathirunnekil.. pinne sharikkum dhukkikkum...!
Sir parayunnath clear aayi manassilavunnund...
Thank u so much...

[@farhana3253]

No words to describe how understanding your class is..

[@anseelaansi6401]

Very helpful. Thank u sir

[@aminaaami2830]

awsome clss sr ❤️its rlly hlpful...🙁

[@nimishakv6185]

Very effective class

[@adarshp3143]

Great class👏👏👏👏

[@mahadevananair2481]

Thank you sir ❤️

[@afeefkp8558]

thank you so much sir. I''ve passed my first semester by watching your videos.
😍😍😍😍😍

[@naveenbr1336]

Awesome class ❤️
Keep going sir..

[@salmah7675]

Thanks sir 🤩

[@krishnasbiju6272]

Thankyou sir..

[@akshaydevaganga]

Sir you are really great.Thank you very much Sir🙏🙏

[@amalekjohn3715]

Thankuuu sir ❤️❤️

[@nibhakumari8080]

Very helpful video

[@edwincshony2735]

Best class ever for lsd❤❤❤❤❤

[@circuitsanalytica4348]

Nice video, keep going sir....

[@sherinjoji930]

Thank you a lot sir

[@kathrine7075]

Boolean expressionil enable antha mention cheyathathu??

[@gokulraj9591]

🔥🔥🔥

[@__Amar___]

👌👌👌

[@sona8885]

Sir Boolean expression ezhtumbol SOP form il aahnallo ....ath nammade choiche aahno SOP form il cheyyunath..mikka questions ilum SOP form aahnallo POS form illallo...athenthaa??plz reply

[@aei-01.aiswarya.a.s36]

sir 18.35 Truth table azhuthumboo S0 S1 S2 ee orderil azhuthamo it's not compulsory about S2 S1 S0 isn't

[@adnanyousuf5014]

🙋

[@sajinraj-jy3rf]

Super class

[@ShastraTechnicalInstitute]

Always Welcome.. Keep watching 😍🥰

[@editorschoice8582]

❤

[@ANGamer990]

Naale exam ulla Aarengilum indo 😂😉

[@smeenakshi2985]

Sir electrical kaark ith refer cehyavo

[@akhiljithk7173]

why multiplied with D0 D1 with minterms?

[@ShastraTechnicalInstitute]

MUX is Always designed using SOP

[@jithinjoy4806]

Sir 8 input OR gate ullathaano

[@mohamedfayis1561]

CS203 remaining topics upload chayyaavo please?

[@ShastraTechnicalInstitute]

Exam date ?

[@mohamedfayis1561]

@@ShastraTechnicalInstitute 30th Oct

[@flametgegaming2676]

Sir ivde S2 s1 s0 enn alle 8 :1 mux nu eduthe. appo 2:1 nu s0 s1 nnu eduthu.. engane venelum edukkan patto

[@ShastraTechnicalInstitute]

S0 S1 S2 ingane aanu default aayittulla representation !!!
Opposite aayi eduthaalum no issues

[@sanalls]

@@ShastraTechnicalInstitute angane aavumbo boolean expression maarille?

[@circuitsanalytica4348]

Usually select line address is mentioned in little endian format I.e. S2 S1 S0 for 8:1 mux, if tat us the case for 4:1 mux, tha should be S1 S0.

[@IGSkullYT]

Ithinte Question engane aarkum cheta varunne examnu?

[@jmahadev8225]

ellaa parayilaaaa

[@IGSkullYT]

Wwwodeey Ithu Aara😂😅 Oduvil neeyum Ivde Ethyooo

[@akashs5053]

Ariella

[@IGSkullYT]

@@akashs5053 onnu podaa😂

[@IGSkullYT]

Ellarum ivde ondallo😂

[@madheehakhullath8463]

Thank you sir

[@ShastraTechnicalInstitute]

Most Welcome !!