At 33:31 Loop 1 is drawn going from the cathode to the anode of the diode. This would occur during reverse recovery, but only for a short period of time. Was this loop meant to include the inductor and output capacitor?
Dear @ats89117, we just talked to Dr. Ali Shirsavar, and that was his response to your question: "Loop1 is drawn for when the current is conducting through the switch, i.e., when the switch is turned on. Loop2 is drawn for when the current is conducting through the diode, i.e., during switch turn-off. From a layout perspective, we are just trying to identify which loops have high di/dt at "some point" during the switching cycle. Apologies for the ambiguity!"
Was there ever a similar video where he talked about switching node dv/dt and their implication in layout? Somebody please point me to it. I was watching the Power Electronics course of MIT and they mentioned about it; however, the way the professor explained it wasn't enough, or at least made simple to understand enough, for me to wrap my head around it.
can you help educate why there is no mirror of diode current on the return path? because it goes into inductor and change to inductor ripple current and mirrored to GND instead?
Probably for the same reason that there is no return current for the load and capacitor. When is off, the inductor and capacitor become the "power supply"
@@OMICRONLabTutorials I want to know what happens to the magnetic flux when there is a short between power rail and ground especially on multilayer board. Is the magnetic field cancelled out or somehow concentrated and disturbed resulting in stronger field?
@@farisikhmal4868 generally a short will cause a high current and a high current can cause a high magnetic field. If this field disturbs something else will depend on the situation.
You are one of the best teachers that I ever had. Thank you so much, Dr. Shirsavar!
Thank you Dr. Shirsavar for such a great webinar. It helped me a lot.
Great job, Dr. Shirsavar, you explained a complex subject, so the average man can understand it.
Great video. Good refresher.
Excellent tutorial.
This is one of the best videos explaining with simplicity current loops! Great and thank you for sharing.
Thanks! We will share your feedback with Dr. Ali.
Thank you so much for this excellent webinar 😊
Thank you for teaching me such good information.
Thank you so much, your way of explaining is genius! It is always crystal clear!
thankyou dr. ali
Great webinar!
Thank you!
Thank you so much for sharing this knowledge
Glad it was helpful!
Thank you!
thank you for great presentation! '
Glad you enjoyed it!
Amazing
At 33:31 Loop 1 is drawn going from the cathode to the anode of the diode. This would occur during reverse recovery, but only for a short period of time. Was this loop meant to include the inductor and output capacitor?
Dear @ats89117, we just talked to Dr. Ali Shirsavar, and that was his response to your question:
"Loop1 is drawn for when the current is conducting through the switch, i.e., when the switch is turned on.
Loop2 is drawn for when the current is conducting through the diode, i.e., during switch turn-off.
From a layout perspective, we are just trying to identify which loops have high di/dt at "some point" during the switching cycle.
Apologies for the ambiguity!"
Was there ever a similar video where he talked about switching node dv/dt and their implication in layout? Somebody please point me to it. I was watching the Power Electronics course of MIT and they mentioned about it; however, the way the professor explained it wasn't enough, or at least made simple to understand enough, for me to wrap my head around it.
Sorry, we are not aware of a video where Dr. Ali focuses on dv/dt impact.
can you help educate why there is no mirror of diode current on the return path? because it goes into inductor and change to inductor ripple current and mirrored to GND instead?
Probably for the same reason that there is no return current for the load and capacitor. When is off, the inductor and capacitor become the "power supply"
Too good
Is a PWM signal between 0 and 5V considered AC or DC when it comes to return current path?
Can you please try to re-formulate the question and send it to support@omicron-lab.com? Not sure if I understand it correctly. Thanks!
Great presentation, You mentioned a book about power supply layout @ 34:38. Can you share the author and book name? Thanks
Maniktala: Switching Power Supplies A-Z (ISBN 9780123865335)
If I am designing PCB stator, what are things that do not and things that I should do ?
Sorry, unfortunately we don't have experience with PCB based stator design.
how about magnetic field on shorted traces ?
Can you please be more specific on your question and send it to support@omicron-lab.com? Thanks!
@@OMICRONLabTutorials I want to know what happens to the magnetic flux when there is a short between power rail and ground especially on multilayer board. Is the magnetic field cancelled out or somehow concentrated and disturbed resulting in stronger field?
@@farisikhmal4868 generally a short will cause a high current and a high current can cause a high magnetic field. If this field disturbs something else will depend on the situation.
Is this for robotics?
Mostly for electronics. 🙂
Very good presentation, but we probably didn't need to know that you hadn't worn a shirt since last March!