Pequeno RISC-V CPU running Hello World!

In this video, Pequeno CPU implemented on FPGA runs a hello world program and displays it on a serial terminal. The CPU subsystem incorporates a debug UART which is accessed by the firmware to send 'print' messages. Xilinx Artix-7 FPGA was used to prototype and test the CPU.
Pequeno (PQR5) is a RISC-V CPU designed in RTL, which is fully open-source. Interested to know how to design a CPU like this from scratch? Find the story at chipmunklogic.com.
All source codes are available for free in the GitHub repo: github.com/iam...