Ratioed logic in CMOS | Pseudo NMOS | DCVSL | VLSI | Lec-92

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  • Опубликовано: 4 дек 2024

Комментарии • 3

  • @Xzerox07
    @Xzerox07 6 месяцев назад

    Thank you sir awesome Explanation worth for 8 marks❣️🤩

  • @vaibhavmangar2677
    @vaibhavmangar2677 9 месяцев назад +1

    can u explain logic for xor and xnor
    i haven't understrand

  • @APARN-x9b
    @APARN-x9b Месяц назад

    since the load had to drive the output to full Vdd, shouldn't it always be a PMOS in this case