DE 48, Parallel In Parallel Out (PIPO) Shift Register (synchronous loading) with its waveform

[@mashrifejamanradib242]

Helpful sir...Thanks a lot

[@rifatiqbal8076]

Good explanation

[@enjoyelectronicswithvijayp5587]

Thanks a lot dear. All the best

[@maryamfatima5189]

Sir clear kaa work Kya h...

[@enjoyelectronicswithvijayp5587]

Clear is active low and in general working conditions it is kept high. When we need to set output of flip flop at 0 then clear port is made low. Beta Still if u have doubt u may call me.