UVM Simplified (#2 Modules of UVM)

Поделиться
HTML-код
  • Опубликовано: 2 ноя 2024

Комментарии • 12

  • @mohitarora8754
    @mohitarora8754 2 года назад +7

    You know you are one of the best teachers in this whole world...

  • @Gamemagx
    @Gamemagx 2 года назад +2

    You know it well enough thats why u are able to explain it simply

  • @westsidepimping
    @westsidepimping 5 месяцев назад

    This is great explaining. Thank you

  • @sns3670
    @sns3670 2 года назад +2

    Why does monitor have to be part of the agent when its job is to only send I/Os to the scoreboard?
    Really appreciate for all the efforts you put in, and the best tutorial I've ever found :)

    • @ayanavakar
      @ayanavakar Год назад

      monitor,sequencer and driver will work on same type of interfaces and packets , hence they are grouped inside agent . Agent can be active or passive .Passive agents will only have monitor .

  • @bhuvaneshs.k638
    @bhuvaneshs.k638 3 года назад

    Excellent video series 👍

  • @verif_engg_vlsi6754
    @verif_engg_vlsi6754 3 года назад

    Wow
    Just amazing

  • @ramcharanbala430
    @ramcharanbala430 3 года назад

    Great explain..... Can you explain AXI or PCI protocall it is more useful for vlsi freshers who searching job in VLSI verification domain like me .

  • @kaipasahithi3677
    @kaipasahithi3677 4 месяца назад

    What is the difference between uvm_packet and a uvm_sequence_item

  • @jyh4820
    @jyh4820 3 года назад

    Tks

  • @leihuang5640
    @leihuang5640 2 года назад

    hi how can i get the slides?

  • @ronakpatel1026
    @ronakpatel1026 Год назад

    Do you have notes of this ?