Hi sir, If I use current probe to detect the Drain current(Id) whose value is positive in Id-VGS curve. If I use current probe to detect the Source current(Is) whose value is negative in Is-VGS curve. But the current has only one direction from Drain to Source, why one is positive and one is negative ??? thanks a lot.
Hi sir, in video 20:23, for PMOS why can't I use negative voltage(VGS) .dc VGS 0 -5 0.1to simulate, but must use positive voltage (VSG) ? thanks a lot.
thanks for your reminder. If want to use VGS，the voltage source's polarity must be inversed to -+ and type initial value VGS=-5，then the simulation's result will be correct.
Hi sir. i know its a bit late. but can you please tell me how to calculate the unCox and upCox values from these. the values which I am getting from the spice error log don't make sense. when I am calculating it using Id value, I am getting a different answer. and when I calculate using the gm value, I get an entirely different answer.
Hi Kshitij, the upCox and the unCox are defined in the model file which can be downloaded here: github.com/ianleeflc/CE241_Fundamentals_of_Computer_Logic
Sorry for the late response. Please refer to Dr. Baker's CMOS textbook to find the values of kp and cox for the model used in the simulation. www.amazon.com/Circuit-Design-Simulation-Microelectronic-Systems/dp/0470881321/ref=sr_1_2?dchild=1&keywords=cmos+simulation+baker&qid=1616696008&sr=8-2
Hi sir, If I use current probe to detect the Drain current(Id) whose value is positive in Id-VGS curve. If I use current probe to detect the Source current(Is) whose value is negative in Is-VGS curve. But the current has only one direction from Drain to Source, why one is positive and one is negative ??? thanks a lot.
Hi sir, in video 20:23, for PMOS why can't I use negative voltage(VGS) .dc VGS 0 -5 0.1to simulate, but must use positive voltage (VSG) ? thanks a lot.
I think it would work. Did you change the name of the voltage source to VGS? 'VGS' or 'VSG' is just a label but not a polarity.
@@josephhuang6585 Send your schematic to yiyanli185@gmail.com and I'll take a look at it tomorrow.
thanks for your reminder. If want to use VGS，the voltage source's polarity must be inversed to -+ and type initial value VGS=-5，then the simulation's result will be correct.
@@josephhuang6585 mine didnt worked
at 20:23 can i connect VGS between gate and ground and give VGS=-ve?. because i tried doing it and results are not correct.
how did u get the dialogue box to change the width @17:29
Ctrl and right click I believe.
Hi sir. i know its a bit late. but can you please tell me how to calculate the unCox and upCox values from these. the values which I am getting from the spice error log don't make sense. when I am calculating it using Id value, I am getting a different answer. and when I calculate using the gm value, I get an entirely different answer.
Hi Kshitij, the upCox and the unCox are defined in the model file which can be downloaded here:
github.com/ianleeflc/CE241_Fundamentals_of_Computer_Logic
@@yiyanli6937 Hello sir. kindly check your email. i have detailed my doubts there. It would be of great help. Regards from india
Hi sir, can you show me simulation to determine the value of kp or uncox by using LTSPICE? Thank you.
Sorry for the late response. Please refer to Dr. Baker's CMOS textbook to find the values of kp and cox for the model used in the simulation. www.amazon.com/Circuit-Design-Simulation-Microelectronic-Systems/dp/0470881321/ref=sr_1_2?dchild=1&keywords=cmos+simulation+baker&qid=1616696008&sr=8-2
Hi Sir, can you share me the models.txt , couldn't find it in your website.
Here: github.com/ianleeflc/CE241_Fundamentals_of_Computer_Logic
Can you obtain the KP of C5 process?
Sorry, I don't know the answer to this question.