Building Ben Eater's CPU ( Part 3 ) Basic Registers and BUS Buffers. Digital Logic Sim. (DLS)
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- Опубликовано: 14 окт 2024
- This is part 3 of a video series where I replicate Ben Eater's 8-BIT CPU in Digital Logic Sim.
In this video, I build the 1-BIT Register and connect multiple of them together to make a 4-BIT and 8-BIT Registers. They will be the bases of each register and the step counter and program counter that I build in my future videos.
I then connect multiple tristate buffers together to make 4-BIT and 8-BIT BUS Buffers.
If you have any Questions or Suggestions, comment below.
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/ ajax123z
Link to Digital Logic Sim.
sebastian.itch...
Thanks for Watching!
Cool video 👍🏿
Thank you!
You can prepare a mux beforehand since you just made one purely out of the basic logic gates, you can compress it into its own chip for the purpose of the simulation.
Are you talking about the BUS Buffers? I'm pretty sure a mux is a multiplexer, and a buffer is a buffer. I didn't make a multiplexer in this video.
Just to make sure I watched the video back. I don't make a mux in this video.
When I make the Ram chip in a couple of videos I'll be making a mux as well as a decoder.
@@ajax123z yes a mux is a multiplexer, however when you're building the registers, I'm familiar with the design since Sebastian lagues himself showed it. It uses the d flip flop with the clock inside, and has two inputs. Data and load. With the load signal turned off whatever data is in the flip flop gets fed back to the flip flop. With load. Turned on, the flip flop now listens to the data from the data input. This thing that selects from 2 sources to transfer the data to the flip flop, is the mux, and the load signal is the select signal. You'd end up with the same design for a 2 bit mux which if I'm correct is just selecting the data from either of the two inputs using a second selection input.
Go back to 4:08 and look on the top left, this part is the mux that selects between the flippl flop output and the data input to feed back into the flip flop. @@ajax123z
@CybernetonPL oh. I get it. I was confused about which part you were talking about. Yes, it is a mux used to select the signal for the data and store. I didn't realize that until you pointed it out.
And yes, I'm pretty sure this base register component is Sebastian Lague's exact design. It works best out of all the ones I've made and seen
I will build on the register to give them a reset signal in a later video.
Pleas can you make a video for how to expand the view in digital logic
Also I am using laptop so i don't have mouse
What do you mean expand the view. Like zoom in and out?
If you are talking about Zooming in and out. That Is a modded version.
I have a link to it here on my community post.
ruclips.net/user/postUgkxvAIxfhN3cCDI2RTMe-m3L4oMmG2nECLH?si=_XVnB9Nxu59RYkbi
@@ajax123z thx
@dojy_53 you're welcome. Use at your own risk, tho. I didn't make the mod.