RISC-V Assembly Hello World (Part 1)
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- Опубликовано: 4 авг 2024
- In this video, we learn about the RISC-V instruction set architecture. We setup and run an initial program to call the exit syscall.
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Timestamps:
00:00 Intro
00:35 ISA Background
01:11 Initial Setup
01:45 Make Code Visible to the Linker
02:54 Exit Syscall
04:02 RISC-V Assembly Programmer's Handbook
05:55 Load Immediate
06:36 Linux Kernel System Call Table
07:24 A7 Is Important
07:55 ECALL
08:32 Generating Executable
10:37 Part 2 (More Instructions)
10:58 Recap
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Links Mentioned in Video:
Risc-V Reference Manual:
riscv.org/wp-content/uploads/...
Syscall Reference:
marcin.juszkiewicz.com.pl/dow...
Exit Manpage:
man7.org/linux/man-pages/man3...
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Videos this niche have no business being this well made! Instantly subscribed and liked!
I have to agree, did the same thing.
Same here. Well done!
Hopefully it won't remain niche.
One of the most fun aspects of learning a new architecture is seeking analogies with architectures you're already familiar with to make the learning easier, like the purposes of the registers, etc.
EXTREMELY CLEAR explanations, and remarkably-good production value, thank you! 😃
This is SO cool! just what i was looking for atm! Thank you so much for making this, can't wait for the next part! :D
I was just tryna find some videos to study but I didn't exepct to see lain refrences. Made my day.
I watched the intro and instantly hit subscribe.
Am excited to watch the video now :D
Edit: i have not been disappointed!!
Awesome video!
Really good video -- everything was clear and most of my questions have been answered. And it is interesting to watch! Huge thanks!
Youre awesome Laurie! I got a StarFive board so I can tinker with Risc V on real hardware. Your channel and people like you are the only thing keeping my faith in humanity alive this decade LOL
Nice! Was looking for something to learn so the moment, thanks for the introduction!🔥💯
Thank you, you are amazing! I really enjoyed your great presentation and was able to follow along. I look forward to learning more about RISC-V assembly.
subscribed as soon as i saw your work, I will visit these videos often thanks for the lessons.
Your work is amazing!! congrats from Brazil
Wow! Great presentation, great effects and you are a great teacher!
Thank you so much for the great work, you got a new subscriber!
Good introduction to RISC-V. Thanks for the video.
This already was a nicely informative video, but it's even better because of the XP Luna shell
Great job Laurie!
Brilliant work, really.
Great tutorial!
Great ❤ Lauri ^^
Simple to understand!
Please continue this series
So cute and pleasant voice
Hey, Laurie! I really enjoyed your video, and it has sparked my interest in RISC-V.
I do have a question, though. Doesn't QEMU already provide emulators for RISC-V architecture-based systems? If so, I was wondering if there was a specific reason why you opted for an ARM emulator instead of using QEMU's RISC-V?
Hey there, nice video !
I just bought a Star64 Risc-V SBC myself, and i kinda struggle to install -any- software on it, since we have to compile everything, and the SBC itself isn't that powerful...
Your content is way more of a low-level / close to hardware type of work, it's impressive ! 😄👍
Also, out of curiosity, what do you use for your tests btw ? an emulated riscv64 vm using qemu ?
Nice video, once again, just subbed to your channel ! 🦾
take care ✌
Cute into
I was even having cereal at the time 😅
thank u
Hi, Laurie!
1. How did you get the `riscv64-unknown-elf-as` binaries on your system?
2. Why are you directly running the `hello` binary, not in QEMU, and it successfully runs? Don't your host and the binary use different architectures (ARM vs RISC-V)?
Ad2: this is magic of package "qemu-user-binfmt" (at least on Arch, but I suppose the package is called similarly on other distributions). This package mounts "binfmt" kernel handlers for executables (this is the part of the kernel that knows that a file starting with #! is a script). Handlers recognize for which CPU the application is compiled and automatically run it under appropriate qemu version.
Thanks
I laughed so hard on the dog voice at 2:08 😂😂😂😂😂😂
Good stuff! You have no idea how much fun I'm going to have leveraging AI for system cpu calls 🐙😋
Thanks for the video ❤.
P.s. I hope that's XP Pro 😋
wow
i love javascript
Thank you very much for such a detailed video. Could you also please add if there are any installation requirements to follow along with your video?
Nice video but you looked at the man page for the C library exit function, which is the same on any Posix system whether Windows or Mac or a *nix, not the Linux exit system call which is a different thing. They happen to have the same status argument but the C library function also calls exit functions before doing the syscall. You wanted "man 2 exit" not "man 3 exit".
💯man 2 == kernel sys calls, man 3 == lib funcs\subs (not that it really makes any difference in this case since she didn't link any libs)
Yes! I loved the video, but that part was bugging me. 😊
What keyboard are you using? Sounds amazing!
Is the RISC V and MIPS 32 the same ??.... The instructions looks similar!?
I thought assembly bypassed OS level interaction completely, i.e. instructions are loaded into a stack that a register points to and the way to exit the program would be pointing to either whatever was in the stack before program load or a specified point in memory at which point OS picks back up? I learnt some x86 assembly a decade ago and I'm not sure if that info carries over, so I might be completely wrong or outdated.
This is assembly language to run under an operating system, in this case Linux. Assembly language that runs without an operating system has no way to exit -- at most 1) infinite loop, 2) reset the hardware and run again, or 3) *maybe* turn off the power (it's a PC feature not a normal embedded system feature)
I fell in love.
You remind me of when I was younger and coding in M6809 Assembly like crazy every day. I miss M6809. I also miss the OS9 operating system. I don't know much about RISC-V yet. I have been holding off because it was really slow and immature last I looked. However, I think I am hearing something about an extended instruction set capability or such that can be used for building an AI accelerator?? Not sure.. I will research this tomorrow. Is there a way to build numerical parallel compute cells, by chance? The mnemonics look fun. I have a special kind of catalyzed neural substrate emulator.... I wonder if RISC-V might be a good place for an implementation of it.
Which assembler did you use?
Could be used as part of an intro to RISC-V assembly.
to learn this stuff i truly believe you have to be some kind of alien from the future.
Or any computer science student.
what's her desktop in the beginning of the video? is this just edited in post? also like she has windows xp panel but windows 10/11 terminal? can someone explain her setup?
It's just a Windows XP with customized icons, probably.
It's Windows 10/11 with a Windows XP theme.
Risc-V is an open ISA, but it is not open source or GPL like Linux. The core funktions are known, but it is possible, that nvidia or intel make a risc-v processor with closed extentions.
Love u, Laurie
We (at least I) need some videos about (dynamic) reversing Android .so files because many firmware lock placed there: camera features, wifi bands (5 Ghz, hidden telephoto lens, Hi Samsung) and etc
😊
Is riscv64-unknown-elf-as part of standard GCC & can be installed on any architecture?
On Debian systems (so also Ubuntu etc.), you can install it with the package manager. Here is a full tutorial I wrote how to do it, which also uses just "gcc" instead of the 2 steps "as" and "ld", prints some text, and has some more background information: gist.github.com/Frank-Buss/aa6aa7d4907335e4a529e8cf3e82f47e
I even come from the land of machine code programming, but where is the need for a assembly code programming for these niche archs? Is it just for fun sake?
Well, RISC-V's main product segment for a while will be embedded, thanks to the super simple instruction decode and free to use design. Higher level languages, though supported on risc-v pretty well, unlike some other microcontrollers, still might not support any custom extensions, or some such that could be added in the implementation. I could see a modded assembler being very easy for a company to make before C could make use of the instruction natively. Otherwise it's good just to get familiar with it, I think, and for computer science RISC-V is excellent curriculum since it's both unlicensed, and relevant for future use, unlike previous curriculum ISA's that focused on MIPS for pipelining etc architecture, or PIC16 or something for assembly programming.
FIRST
It is so nice, but command displays are so small .
I guess it would be nice to double the font size at least for the viewers please.
I never knew the V was a roman numeral, I thought it was supposed to be a letter
I always pronounce it as the letter "v" in my head so it was hard for me to remember to say "5" while making this :)
RISC 1 to 4 existed as well, SPARC was born from one of them
Windows XP OMG
helo
hi
I find myself trying to find mouse power cord pinout and processor pins is this diagram 5:14 or just some RDF data samples. You be my Ardenweald Vulpin form 2:04 riding Honda Type R. It's invoked automatically 3:25. And you spend countless knights romantics checking that php function documentation 6:59 str_replace str_concat. This language is a complete primate of object orientated languages and there is nothing you could do with it unless on/off light switches 8:06 which would then be called on the system boot.
Finally, I found you in the "real" world Iwakura Lain, aka @lauriewired