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Thank you sir!...wanted to know whether ADC design projects helps for placement in Analog and Digital domain??

Sir want to purchase your course. No promocode is working now. Please activate 20k again

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Hello Sir can u give an update for the 2025 batch

Nice sir ...

sir what about joining vlsi training institutes after btech

Bro from where we can get subject wise test series

Mai abhi abhi aapke site prepfushion se aa raha hmm.... Waha per itane sare course hai sabhi course kiss tarah se ikdusare alag hai ye pata nhi chal paa raha hai.... Agar aap 1 playlist created kar dete ki sabhi course ikkdusare se kaise alag hai to batter hota...mai aapke ans ka wait kar raha hmm

Course ki validity kab tk ka rahega Purchase date se... Course ka language kiss me hai Hindi English Hinglish 1 bundle wala pack bhi hona chahiye jisme aapke sabhi course ho..agar koi students zero to 100 learn karana chahta ho to wo direct bundle pack purchase kare with discount and study kare... Like bharat Acharya education ...unhone bundle pack ka system banaya hai jitna jade course add honge utna hi disscount

How much entry level salary can we expect as a electronic engineer ?

congrats sir 🔥🔥

I have watched the complete video lecture thank you Himanshu sir for explaining all the timing diagrams and concepts behind it. I have also referred my friends to watch this. pls come up with constraints, crosstalks, CDC, and timing, area, power reports concepts

Thankyou sir! ❤Very fill full explanation If I further any doubt in DSD I would like to prefer your video Only🙏

pls repost that 15 hour video

Congratulations 🤝 @HimanshuAgarwal

100k is coming ✨✨

❤❤❤❤

This channel Deserves million subscribers 🎉

Congrats Himanshu ❤❤

Congo bhaiyya ! 🎉🎉

Congratulations himanshu!! Here's to many more!! ❤

such a beautiful explanation of all the concepts, the way you explained all the difficult concepts with such ease and that too leaving us with no doubts at all.. really really commendable. Thankyou so much for the video! It is perfect🎉

How can I apply for a company or other company please help and provide tips I am fresher I completed Hardware and Network Engineer

perfect perfect perfect luv u bhai Best explanation Hats Off to you

@ 1:13 pmos is in saturation region than to increase current why vsd will decrease

Concepts have been explained extremely well and with proper depth. The best one so far to clear all your doubts. The detailed explanation and problem solving using timing diagram is the best way to make someone understood STA to its depth. Efforts are highly appreciable and commendable.

Thank you very much Himanshu bhaiya for this awesome video. After watching this video I understood STA in a easy manner, as a result I was able to do all the sta related questions correctly yesterday :) Thank you again. Want more videos on VLSI physical design flow :)

Cadence ke jagah Proteous use kar sakta hai kiya??

there should be a scan QR code here like we take in marriage lifaafa , so that directly can pay, haha, unbelievable feelings after all concepts cleared, feeling like big burden released, definitely who dont got in touch with you till now or your any sources, they are unlucky enough while preparing for gate and interviews

Timing diagrams ❤ thank you so much. im doing mtech at iiit allahabad,sir i wanna revise sequential circuits, can i get subscription for only sequential circuits playlist rather than total digital electronics playlist

Himanshu sir , I am from tier 2 college, but gap year of 2 yrs ,due to competitive exam preparation, Now I want to make career in vlsi analog/digital field, will gap year make any effect.I have done BTech Electrical engineering.

Hello sir... I'm a first year btech student ( electronics department) and I'm very much interested in vlsi domain....i just want to know that is maths required in this....if yes then please tell me what are the important topics so that i can start my career in vlsi from the very beginning 🙏🏻🙏🏻🙏🏻

Great explaination

Texas instruments is my dream company 😍

Good content explained

Sir what about mixed signal jobs?? ..what is the roadmap for it..can you cover the topics for mixed signal job placement..

Superb video sir , till now i thought i was good in these set up and hold time analysis .. but after watching this video , i would say its worth my time because i learnt new appraoches and cleared my misconceptions in this concept ..good job sir , keep going 🔥🔥🔥

please cover effect of jitter and derate in STA

bhaiya verilog course will come in 2025 starting (upto march) or later till oct-nov?? please reply

Hai himanshu, about mixed signal design jobs u didn't say anything in the video. Do we need to prepare analog and digital both for that profile ?

Insightful video.

Great session sir😀

Fpga project on bank vault locker and testing stuck at faults in kogg stone adder are these projects worthy enough to add in resume ??

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What do you give suggestions for new GATE ESE Aspirants to get in Mtech,JRF,I tried 2 times ,not successful in GATE 17,18 left it. What will be your tips and tricks for GATE preparation either prev question papers,test series , lectures benifits and finally which is best in your perspective good subject experts in institutes

Thank You Sir! for your guidance, as you mentioned that we need to prepare network theory, control systems, Analog Electronics and Analog IC design but I had a doubt that "is the two playlists of razavi covers both Analog Electronics and Analog IC design?" please reply back sir! I'm waiting for you response. Because why i'm asking this question means "in digital vlsi we have digital electronics separately and digital ic design separately where as in analog vlsi, there is playlists from razavi naming electronics part-1,2.

Again phenomenal video sir as always 😊

loved these contents bhaiya ......want more vlsi oriented vedios please

evela madkondu kelsa engee madtya guruu, super bro neevu

Himanshu , your concept knowledge and teaching is really good. Along with this it would be great for students if you can recommend good books and literature which they can refer.