Cache, Memory bandwidth and Spatial Locality

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[@jagadishbagul8634]

very helpful sir. i got it in one shot . Thanks a lot .

[@thongnguyen1292]

3:52 Why do we have 2 operations here? I see 2 memory operations (2 loads) and 1 floating point operation (1 multiplication).

[@chloedsmith]

It's a multiplication and then an addition as well, just one instruction

[@Tsunami_415]

As a consumer, would searching for a cpu with more bandwidth be preferential to having more cores in terms of faster performance and longevity? I am curious whether 2 extra cores would matter more than having a larger L1 ,L2 , L3 Cache. My apologies if this is unrelated.

[@tarunpahuja3443]

Didnt get why it took 100 ns for first 4 bytes but just 5 ns for next 4 bytes. Should not it be same for all bytes ?

[@hrs7305]

You are pipelining the data transfer through the bus so essentially all the memory 4 byte memory transfers took 100ns but 2nd memory transfer occurs 5ns after the 1st and so on