how to use modelsim for verilog code| modelsim working for half adder

modelsim for verilog | Modelsim software | half adder code in modelsim| how to use modelsim in English
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half adder rtl coding
half adder testbench

[@sree_r4g_]

While writing the tb of halfadder, unexpected error coming at the TB CODE closing of begin statement (end) there is no syntax error.
What should be the error?

[@sree_r4g_]

I tried to find still no solution

[@vlsiknowledgehub]

​@@sree_r4g_Please do as like same in video I explained..it will not come.

[@funnyworld2436]

Will you post more videos on using verilog code it will be really helpful for poor students like me

[@vlsiknowledgehub]

Okay sure...I will post soon

[@ANIKETKUMAR-ui2fv]

mam how i can see the circuit diagram of half adder in modelsim

[@vlsiknowledgehub]

Here you can see waveforms

[@threepointertv8048]

how to disable code folding on modelsim?

[@مرتضی_افروزه]

That's awesome.