GREAT BUILD!!! Another possibility is to run single power rails along the left and right sides. Put a beefy 470 cap on each rail, and use a .1 uf cap on each power rail in the build itself. Connect each breadboard individually (no daisy chaining boards) to the power rails you just ran which now act as a buffer. Hope that makes sense.
What a cool build. Thank you for sharing. Great information about timing. I might suggest: getting a higher current power supply, running individual power wires to each breadboard, and placing a decoupling capacitor on nearly every chip, as close as to the pins as possible. Then, a smaller bulk capacitor could be used on each board. An old PC power supply can be used to power something like this--just making sure you have the ground and 5v lines, as their are 12v lines, as well. Some power supplies have negative voltages. Also, perhaps a very small pulldown resistor, such as a 10k might prevent ringing on the bus and logic lines.
Thank you for the nice words and your suggestions. Indeed I upgraded the power supply from that simple breadboard power feeder to a (cheap) bench power supply. That allowed me to crank the voltage up to 5.2V which allows the system run more stable (especially the keyboard). Adding those decoupling caps to all the chips that have a direct connection to the clock line was the change that made the integrated system run stable for the first time. Ever since I add a cap to every new chip. And yes: From time to time I wish I had a direct power conenction to every single board and not just sections of boards. But most of the time my built runs stable enough.
Thank you for your nice comment. The next video (covering the instruction decoder, control logic, reset cycle and interrupt logic) is already scripted and planned to be going released in a few days.
Great news! I’m building my own 8 bit computer based on videos from Ben and James and your design is of particular interest to me as just like you I decided to use 64kB memory so 16bit address line. But I wasn’t planning on a separate memory bus, so that’s interesting. I can see from you schematics - if I read them correctly- that you access ROM when SO is not low and you address the 3 highest bits. I’m looking forward to your future videos. Many thanks for posting them and the schematics
This is a great set of videos and a fantastic build. Thank you for sharing both on here and via GitHub. On your clock schematic on GitHub I spotted a small typo. It is on the middle 555 timer and pin 7. I think it should be connected to VCC instead of ground. I double checked on your video and you have the 1m resistor going into VCC.
This is some impressive work! My computer is still a work in process, and I recently changed the step counter chip to a ‘393. It counts on clock high to to low phase, removing the need for inverting the clock. Is there a reason you’re not using one, and instead invert the clock? Mostly wondering since maybe there’s some flaw with my ‘393 idea? I haven’t seen it used by anyone else. Again: really impressive stuff!
Thank you for your nice comment. There's nothing completely wrong with the 393 type, but it's not suitable in my situation for two reasons: 1. It doesn't allow for chaining since it has no ripple carry out flag. 2. It doesn't allow for presetting the counter to a specific value. My step counter is more like a micro code program counter. It is 12 bits wide and is not being reset at instruction start but instead loaded with an instruction specific start value. If you're interested in more details, you might want to watch my video about the control logic and instruction decoder of my build at ruclips.net/video/nNKOJ-0p7pg/видео.html . But if all you need is counting from 0 to a value less than 16 - like in Ben Eater's build - you will be totally fine with that chip type.
The TLC555 is generating the system clock. A NE555 has a maximum frequency of about 500kHz in astable mode, while the TLC555 can run as fast as about 2MHz. Since my system is running at about 1.8MHz a NE555 wouldn't have been sufficiant. The two NE555s are only used to debounce the single step push button and the stop/run switch. So for that purpose I could use those cheaper type of 555 that I had already lying around here.
@DerULF1I am trying to recreate your design. I am confused, though, For the clock circuit, it says that C4 is 10nf and it is polarized. Is that a typo? Should it be 10uf like C2 in the Control Logic module? From the video above, it appears to be of type electrolytic. According to the conversion chart, that would be .01uf, which I can't seem to find in electrolytic.
Sorry for me to confuse you. Of course the schematic is wrong in the sense that C4 is not polarized but a 10nf (103) ceramic capacitor. In the beginning it used to be an electrolytic type. But I changed it to a lower value and forgot to update the schematic. A higher value wouldn't cause problems but make stepping slightly slower. At the same time I found out that C5 - which effects the system speed - also has the old value in the clock schematic. Right now it is a 68pf (68) ceramic type capacitor which lets the system run at the speed you see in the video. The 100pF from the schematic was much closer to the theoretical maximum, but later I found out that in practice the system is capable of running faster. I even had success there with 56pF, but I don't have enough courage to keep it. I hope otherwise you get as much fun as I got while building that system.
@@DerULF1 No problem! Just trying to figure it all out. I am guessing that you didn't update the schematics when you added all of the capacitors for the power improvements. Thank you for responding.
Well, in fact I'm still building on it 😉. The core features were working three month after I started. I didn't count the hours, but in total I guess it was something around 250 hours.
If you have a fairly recent CMOS version of the Z80 it should run that fast. What I tried to show in this video was that the frequency limitation lies in my processor design, which of course is much less capable than a Z80. A breadboard computer might run faster than mine if the design supports such frequencies. SLU4 showed his implementation running at 10MHz lately. One can find several VGA implementations based on 74xx chips running at 25.175MHz on breadboards. But I haven't designed for maximum frequency but just for having it even working.
GREAT BUILD!!! Another possibility is to run single power rails along the left and right sides. Put a beefy 470 cap on each rail, and use a .1 uf cap on each power rail in the build itself. Connect each breadboard individually (no daisy chaining boards) to the power rails you just ran which now act as a buffer. Hope that makes sense.
Nice point about the power demands of the ICs. I will need to look into that
What a cool build. Thank you for sharing. Great information about timing.
I might suggest: getting a higher current power supply, running individual power wires to each breadboard, and placing a decoupling capacitor on nearly every chip, as close as to the pins as possible. Then, a smaller bulk capacitor could be used on each board. An old PC power supply can be used to power something like this--just making sure you have the ground and 5v lines, as their are 12v lines, as well. Some power supplies have negative voltages.
Also, perhaps a very small pulldown resistor, such as a 10k might prevent ringing on the bus and logic lines.
Thank you for the nice words and your suggestions.
Indeed I upgraded the power supply from that simple breadboard power feeder to a (cheap) bench power supply. That allowed me to crank the voltage up to 5.2V which allows the system run more stable (especially the keyboard). Adding those decoupling caps to all the chips that have a direct connection to the clock line was the change that made the integrated system run stable for the first time. Ever since I add a cap to every new chip. And yes: From time to time I wish I had a direct power conenction to every single board and not just sections of boards. But most of the time my built runs stable enough.
Fantastic build and video. Please continue
Thank you for your nice comment.
The next video (covering the instruction decoder, control logic, reset cycle and interrupt logic) is already scripted and planned to be going released in a few days.
Great news! I’m building my own 8 bit computer based on videos from Ben and James and your design is of particular interest to me as just like you I decided to use 64kB memory so 16bit address line. But I wasn’t planning on a separate memory bus, so that’s interesting.
I can see from you schematics - if I read them correctly- that you access ROM when SO is not low and you address the 3 highest bits. I’m looking forward to your future videos. Many thanks for posting them and the schematics
i don't understand anything but it is a good show piece, nice video
This is a great set of videos and a fantastic build. Thank you for sharing both on here and via GitHub. On your clock schematic on GitHub I spotted a small typo. It is on the middle 555 timer and pin 7. I think it should be connected to VCC instead of ground. I double checked on your video and you have the 1m resistor going into VCC.
Thank you, and of course you're right. I've put back a corrected version on GitHub.
Awesome vids! Keep making them
Thank you for your nice comment. I have plans to release some more videos of that topic on a weekly or biweekly basis.
great build, i am planning to simulate in proteus first :)
Good work!
This is some impressive work! My computer is still a work in process, and I recently changed the step counter chip to a ‘393. It counts on clock high to to low phase, removing the need for inverting the clock.
Is there a reason you’re not using one, and instead invert the clock? Mostly wondering since maybe there’s some flaw with my ‘393 idea? I haven’t seen it used by anyone else.
Again: really impressive stuff!
Thank you for your nice comment. There's nothing completely wrong with the 393 type, but it's not suitable in my situation for two reasons:
1. It doesn't allow for chaining since it has no ripple carry out flag.
2. It doesn't allow for presetting the counter to a specific value.
My step counter is more like a micro code program counter. It is 12 bits wide and is not being reset at instruction start but instead loaded with an instruction specific start value. If you're interested in more details, you might want to watch my video about the control logic and instruction decoder of my build at ruclips.net/video/nNKOJ-0p7pg/видео.html .
But if all you need is counting from 0 to a value less than 16 - like in Ben Eater's build - you will be totally fine with that chip type.
Use localized LDO’s and run the system off a 7-12V PSU.
Why did you use different 555’s in the clock section - TLC555 vs NE555?
The TLC555 is generating the system clock. A NE555 has a maximum frequency of about 500kHz in astable mode, while the TLC555 can run as fast as about 2MHz. Since my system is running at about 1.8MHz a NE555 wouldn't have been sufficiant.
The two NE555s are only used to debounce the single step push button and the stop/run switch. So for that purpose I could use those cheaper type of 555 that I had already lying around here.
@@DerULF1 Great! Thanks for the quick reply.
Makes sense.
I still have to complete mine 😅
www.youtube.com/@kyuantym
@DerULF1I am trying to recreate your design. I am confused, though, For the clock circuit, it says that C4 is 10nf and it is polarized. Is that a typo? Should it be 10uf like C2 in the Control Logic module? From the video above, it appears to be of type electrolytic. According to the conversion chart, that would be .01uf, which I can't seem to find in electrolytic.
Sorry for me to confuse you. Of course the schematic is wrong in the sense that C4 is not polarized but a 10nf (103) ceramic capacitor. In the beginning it used to be an electrolytic type. But I changed it to a lower value and forgot to update the schematic. A higher value wouldn't cause problems but make stepping slightly slower.
At the same time I found out that C5 - which effects the system speed - also has the old value in the clock schematic. Right now it is a 68pf (68) ceramic type capacitor which lets the system run at the speed you see in the video. The 100pF from the schematic was much closer to the theoretical maximum, but later I found out that in practice the system is capable of running faster. I even had success there with 56pF, but I don't have enough courage to keep it.
I hope otherwise you get as much fun as I got while building that system.
@@DerULF1 No problem! Just trying to figure it all out. I am guessing that you didn't update the schematics when you added all of the capacitors for the power improvements. Thank you for responding.
Schematics are a bit like comments in programming code: nothing enforcing it to be correct or up to date. 😅
How long did it take you to build?
Well, in fact I'm still building on it 😉. The core features were working three month after I started. I didn't count the hours, but in total I guess it was something around 250 hours.
Could turn that into a kit. 20 little circuit boards that connects together
Hmm.. my breadboard Z80 computer works at 10MHz with no issues.
If you have a fairly recent CMOS version of the Z80 it should run that fast. What I tried to show in this video was that the frequency limitation lies in my processor design, which of course is much less capable than a Z80. A breadboard computer might run faster than mine if the design supports such frequencies. SLU4 showed his implementation running at 10MHz lately. One can find several VGA implementations based on 74xx chips running at 25.175MHz on breadboards.
But I haven't designed for maximum frequency but just for having it even working.