Unit 4 L8 | Memory Address decoding in 8051| memory address decoding
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- Опубликовано: 18 сен 2024
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memory address decoding
address decoding in 8051
memory address decoding using NAND gate in 8051
memory address decoding using 3X8 Decoder in 8051
Outstanding ma'am ....👌👌👌
We feel proud about your hard work.
People like you can never fell down because you are so helpful for others.
We love you dear SISTER.
Thanku so much😊😊
Great learning channel..
Thanku dear
Masha Allah maim power videos
Super explaination☺️
Thanks
Thank you Mam
Mam how we decide that, this address line active when we gave 0 as a input?
And other question is chip select have unique address or it changes with time? As you gave example like 4000 to 4fff and in next example it will be 3000 to 3fff
Chop select lines are fix for respective size of Memory for example if memory size is 8K then only 13 lines will be used as address lines remaining 3 can be used as chip select lines
Now possible combination for 3 bit is 0 to 7
Means it can be any from 0 to 7 for respective memory
Love you
Mam syllabus cover ho jyega na 31 ko exam h
I.know
Mam how many chip select present in a cpu
Please check answer of previous question
Abhi tak to mam unit 5 start bhi nii kia apne
Start kar di hai unit 5
Assembler Directives, instructions hai all uploaded only interfacing left which I will upload tomorrow
Check this playlist
Mocontroller 8051: ruclips.net/p/PLU-faXGCDVRI6oByNwBKRbXhSR92ozbHe
From assembler Directives all topics from unit 5