@@sambenyaakov Helllo, I appreciate also, I am following your explanations even if i am a "false beginner" (my true job is piano tuning and regulation/repairs). I think I grasp % may be, often going back until I have it, but my impressions is that it helps to shape my mind in regard of "what is a mosfet used for in the first stages of laptop alimenations " it make mosfet and drivers more familiar, I am sure it helps me ! Thank you
Thank you Prof. Ben-Yaakov, well-explained and very thorough. Videos like this help millions of students who cannot afford expensive books and after-school institutions. You are a teacher of millions: what a big class you have Prof. Ben? Thank you for running a school without boundries and with A-class level. God bless you and your team.
Best explanation I ever found so far on RUclips, and from elsewhere (including some webinars from semiconductor manufacturers). I'll recomment your video to everybody who'd like to know more on this topic, and on my own videos if it comes the chance. Thank you for posting, greetings from the Alps.
One of the best MOSFET driver tutorials that you can find on the internet. As usual, clips of Pro. Sam Ben-Yaakov are very practical and his explanation is intuitive and can not be clearer. Watching hours of his lectures on RUclips saves me days on the labs. These are some of my favorites on his channels: PWM controllers (signature is peak control mode), MOSFET drivers, Ground looping, inductor/transformers. I just wonder is there any book that he has published which covers those topics, i definitely stock it up on my shelf
Such elegance in every depicted detail can only come about through a long experience of dedicated work. Congratulations and thank you for your presentations.
Your explanation is simple, deep and educational at the same time. It's been a week that I try to find a solution to control the mosfets of a speed variator for three-phase Asynchronous motor. A floating power supply was essential, and the methods using transformers or optocouplers did not satisfy me. You just saved my life with this IF2110, thank you so much. In addition let me congratulate you on the English used, simple and concise while in the technical field I am more used to French.
Informative, concise, well-explained... It is clear how much you really love teaching, and we all appreciate it. I am an electronics degree student and even though some of these concepts have been mentioned in class (while talking about converters) only with your explanation do I begin to understand how much there is to know about this subject. I am eager to rewatch the video with time and patience to really soak up everything you said. I would be happy if one day I would be able not only to interiorize the knowledge but to explain it half as good as you do. Thank you very much.
ı am following you over 2 years and sir you are a really good person. because you are sharing with us amazing informations. ı respect you very much. thanks for tutorial. be safe.
That is outstanding! I’m an electronics engineer and design power circuits. I have saved many, many videos on machining and other engineering topics to learn from, but this is the first electronics video I have ever felt the desire to save for future reference. Simply superb!
your video is very useful for pupil in confusion on MOSFET like me. now i am in settling my disturbance and do not afraid to observe at PCB of electronics and give advice for those who turn their face away from PCB. thank you sir !
Wow this is the best explanation on power tutorial I'm trying to build a two phase ---two three phase inverter. Thank you you cleared up so many questions i had...
Very useful presentation. I like the methodical approach of showing the problem and then a solution. It makes everything easier and show the real engineering and design process. Now I understand a lot of nuances better.
I couldn't be more grateful for such an amazing video. Even if I am already graduated, this video helped me understand drivers better than any other lesson.
Very excellent explanation, professor. I learnt a lot from your video series and got a better understanding of what is really happening in power generators. Thanks again!
I love how you frame it from an engineering design point of view. It seems obvious now that you have said it. I'm excited to read through all your series. I hope to be able to apply this knowledge at work soon!
Respectable (or not) Niksa, just seen your comments. AS you know, I don't work for you so I really do not have to answer any of your questions. But, as a service to the community I do my best to answer queries that are sent to me. If you would repeat your question in a civilized manner I will answer (unless I miss the question as might happen considering the many questions I receive). Have a wonderful day.
'intuitive " is the word, your reasoning is so clear it is amazing how I can follow you despite being not real electronician, merely hobbyist trying to repair laptops tvs and other ! Thank you so much
@@sambenyaakov great you appreciated it, thanks. I have been lost after "gate power loss" (mainly I can understant the preambules of chapters, which is probably enough for me, but the following make me "loose the Arianne's thread" ;) ) of the explanations. Now wondering if I'd better begin by watching the 2 parts on Mosfet's datasheets , (or some other ?) what do you think ? Thank you again
Thank you for your detailed explanations, they are truly educational and practical. I feel like the fog has been lifted in my mind pertaining to this subject matter!
Thanks for the nice explanation. I have been testing some SiC NMOS and I prototyped a rig with some wires and terminal blocks to see how much switching frequency I can drive the mosfet to with air cooling. I have stray inductance every where of course since it is not a pcb. The circuit is a low side drive of a resistor bank, I observe a weird waveform accross Vds when with the falling edge of the pwm driver. It is not the typical ringing, it is rather a very high spike in voltage that is followed by negative voltage and then the typical ringing around the supply voltage. Snubbing is not getting rid of the first spike.
Very many thanks Professor for such a prompt reply. As always the more one finds out about a situation the complex it can become. Seems likely my problem has much to do with using 6 MOSFETs in parallel & poor dynamic current sharing. Variation in Vth can result in some devices switching quicker causing others to go out of S.O.A.. Advice appears contradictory as fast switching, am told, coupling gates using low or zero series gate Rg & hard switching helps reduce this effect. Am also told that parasitic oscillation can occurr for the same reason & increasing Rg & fitting your recommended Fe bead on each gate cures. In my case looks like some Rg value between these arguments is needed. Experiment is called for. Thanks again. Dave
I used a form of that DC restorer circuit to develop a solid state version of a gate driver for a very large SCR that needs a many amps to turn-on quickly and reliably yet one wants that to be brief to reduce unnecessary gate power dissipation. Selection of a quality pulse capacitor that can handle that repetitive peak current turned out to be key for reliability.
Though I am late to ur lesson but it was marvelous...as an amateur I encountered tons of problems connecting to mosfets in simple and naive methods which by accident worked but mostly either not perfect or doomed to failure....ur a teacher....but a professional one....so many thanks
Your videos are the best. I, as a Master's student of Power electronics, get most of my concepts cleared on your channel. Please explain the effects of body diode in MOSFET and how this varies when we use IGBT.
This issue is discussed in some other videos of mine. In short: the body diode of a Si MOSFET is a rather slow diode so there might be a problem of reverse recovery. IGBTs doe no have an intrinsic diodes so you can parallel them with fast diodes.
I omitted, in my question regarding fast turn-off diodes shunting MOSFET series gate resistors, to say that I do not know much about the original drive speed or frequency but I do know each Rg was 47R with no fast turn-off diode. My question really should have been is relability improved, maybe at a reduction of efficiency, by using a slower drive edges? I have attempted to comply with your recommendations with snubbers & safely limitted my device overshoot although admit I have not verified my circuit at the full 6kW. Thank you again. Dave johnson
Hi Dave, I have seen the two part of your query. Fast turn off could be beneficial to improve the efficiency. The 47Ohm will slow down turn on and hence help reduce the reverse recovery spikes.
Sam, Thank you for your explanation of the concerns of power mos gate driving. I did notice one circuit that was given up too quickly. That was the p and n fet totem pole gate drive that was given up on because of shoot-through. If the input gate resistor is moved from the power fet to the source of the driver p fet you get a fast turn off and a reduced turn on current which is desirable with out shoot-through. Respectfully, Ray
Hi Ray, Thanks for comment. Please indelicate which slide no. or video minute you are referring to. I am always happy to learn but I am not sure what you meant.
Good point if you want an symmetrical drive. In fact you can put two resistors in series between the drains of the drive FETs and connect the gate of power transistor to midpoint.
I've only just discovered this channel, but it looks to be a gem - a real breath of fresh air, with enough attention being paid to the underlying circuit physics to make genuinely useful derivations, as opposed to the vigorous hand-waving available on most RUclips treatments of the material. However, I have a question: in your derivation of the Miller effect, starting from about 5:55, you seem to be claiming that the voltage across C_{gd} is V_{GS} + V_O. From your diagram, the top of C_{gd} is at V_O and the bottom is at V_{GS} - I would therefore expect the voltage across that cap. to be V_O - V_{GS} I am clearly misunderstanding something, but I can't see what it is - maybe I'm making a sign error somehow?
Thanks for comment. This is indeed confusing. Look at this this way: Looking from the gate, Cgd was initially charge to -Vo, and then charge to Vgs. So the total charge needed is (Vo+Vgs)Cgd
At 15:00, with this method, shouldn't there by a multiple of 2 for the switching frequency? Because every cycle you need to turn the element on, then off? Therefore you have to dissipate Q*Vgs twice per cycle, so the resultant formula should be *2* * f_s * Q * V_gs
@@sambenyaakov I see! I though about it some-more and realized the classic physics formula of energy in a capacitor is 1/2*C*V^2. Well at a fixed/constant 'V' if only half the energy is stored in the capacitor, the other half must be dissipated in the resistor. Both times charging and discharging through it. Not sure if that's the right way to think about it (kind of 'hand wavy' description) would you agree?
I think is usefull use term "critical resitance" for oscillation. Critical resitance is Rcrit = 2*sqr(L/C) which give no oscillation beatween L and C, because it gave critical aperiodic course of voltage. Thanks for great material, which take all important information in one lecture.
I appreciate very much your explanations. I wish to ask you if middle trace in 11:02 should be falling instead of rising, given that Igate is positive. Thank you Professor!
Fantastic video, thanks a lot, it helped me understand gate charges, it has always been very difficult for me to realy understand. Greatings from Denmark Morten
Boa tarde! Gostaria de agradecer os ensinamentos que estou tentando em vários vídeos que você está produzindo. São os melhores. Parabéns, ótimo trabalho! Obrigado!
I thought I would try to use the IRS2186 "4A" banner spec to drive 2 HY1920P MOSFETs (4 total) and it's looking like the driver will need to deliver peak 3A. Qtot=200nC, Vgs=10V, Vds=170V Although in practice it gets boiling hot! It is dissipating around 2W of power! Thanks for teaching me this!
I realy like your presentation and also, took notes. However, I'm designing a 144Vdc 6phase inverter at 100A to drive a dual stator PMSM that I've design and currently being built. Just when do we need to isolate (galvinize) the power side of the logic side? Is it just a question of preferences or is it most likely due to different codes or standards if an electronic device is intended to be commercialize ? For a start, I've decide to have a none isolated power and logic power and the choosen driver is the IRS21864PBF which does have a seperate logic ground (VSS) and hi volt power gound (COM) just as you explained and will have to be tie together. At least, I've got this part of my project right! Thanks.
Hi Donald, The purpose of gate drive isolation is not isolation per se, but ground separation. The grounds can (and recommended to be) connected at one point. Without isolation the digital signal reaching the gate driver (which should be close to switches) may and usually be corrupted due to the voltage drop along the ground. Some of this is partially covered in ruclips.net/video/uMe9qthcjS4/видео.html . If not confidential, love to hear about your dual stator drive and motor.
@@sambenyaakov Thanks for your answer. For now, I will stick with my non-isolated drivers since I'm exploring different options! My motor project is not confidential. I invite you to read here: openvolta.blogspot.com/ and my youtube chanel : ruclips.net/video/3U87w2zwoHk/видео.html. I've not been very good at updating my blog or youtube channel. Since, there has been a couple of updates to design that has enhanced the torque and the efficiency. Theoretically, according to the simulations in in FEMM, it can reacht a maximum efficiency of 97%. It's not taking into account the mechanical losses. Also, according to research that I've read, the rotor design is prone to a lot of eddy current losses. So heat is expected and demagnetizing the PM is an other issue. This motor is intedned to be a direct drive. It output 99Nm à 100A nominal. The copper losses are low. THe outer stator has 7 wound turns and the inner stator as 4 turns. At a certain point, the outer stater will not be injected with current and only the inner stator will be energized. Again thank you!
@@sambenyaakov Here's my email donald.wright @ openvolta.org if ever you would like to have my raw data of the FEMM simulations. Also, thank you very much, and thanks you in advance if ever you do comment about my motor project. Best regards, Donald W.
@1:27 after Q2(x axis) isn't it it charges only Qgs not Qgs+Qgd .. because till now all the app notes I have found everywhere it has been mentioned only Qgs not Qgs+Qgd .. Correct me if I am wrong
You may be correct in saying that in the app notes you have seen, the charge is Cgs, but this is incorrect. If this charge would have been Cgs, why do you see the flat portion? This plateau is due to Miller effect caused by the charging of Cgd. All this is explained in video.
@@sambenyaakov Sir I am referring after Miller platue region ( at the end of Miller platue region Cgd charges fully) when VGS rises futher at that time only Cgs charges to reduce RDSon.....but in your videos it shows QGS+QGD both charges. Am I making any mistakes?
How about a high side switch that gets Gate Drive from the High Side Voltage and is switched by an NPN transistor to GND. Not isolated, but you don't always need isolation
What will be the ratings of high side Push-pull fets/bjts acting as gate driver boosters to an igbt based h-bridge if Input to h-bridge is 600v. Should they also be of 600v or less. Plz reply urgently if my question is not clearly understandable to you. You are explaining it at 22:30 time in this video
Hi Dr Sam thanks so much you are very smart and wonderful in teaching, i have question about IGBT, how can i get ride of the problem of higher dv/dt, turning IGBT off with negative voltage does is not effective , so how i can prevent IGBT from blowing up due to dv/dt. Thanks,
@@sambenyaakov I mean how to determine how much dead time is required in order to avoid shoot through when designing half bridge, H bridge or 3 phase inverter circuits. e. g. In a situation where you have high side and low side MOSFETs. Also is dead time implemented in code, hardware or both? Can it be calculated? if you could do a lecture on this matter that would be great 😊😀
Thanks for the informative talk. Just a question, if you are open to talking them - Once the Gate capacitors charge enough and it starts conducting - how is any additional current flowing from the driver supposed to be handled (Lets say we wish to maintain that position for long). Is the resistor @ driver supposed to sink in all that excess charge or the grounding resistor would start to share it?
Happy to answer. For the MOSFET to conduct, there is no need for a current. Once the gate voltage is above the threshold it will conduct. The driver charges the gate until the gate voltage equals the driver's output voltage and the current flow will stop, save some bleeding if the is a resistor between gate and source.
@@sambenyaakov Thanks. I have a Power MOSFET - IRF1404 which requires total gate charge of 196nC but the driver I have in mind (2N7000) has Max drain current of 200mA. Do you think it could drive the Mosfet easily - actually it needs to drive 4 such Mosfets in parallel. Individual drivers to each Mosfet is the way to go or should this single one be enough to drive all of them in its sweet time?
@@royalsingh A single driver can drive the 4 transistors. Think about it as a voltage source charging four capacitors in parallel. But... the turn on time will be relativity long so if the switching frequency is high you will have heavy switching losses which will heat up the transistors. If you use one driver better to use separate (series) gate resistors for each. There are drivers with much higher current.
@Sam Ben-Yaakov Brilliant! Many thanks for your suggestion. Switching frequency is almost negligible, they would be utilized to switch a BMS input supply. Have a Good Day!
Hi, thanks for video. i have question --> can you please explain effect (positive , negative)of body diode of MOSFET in H bridge application(consider all four are N channel MOSFETs). Also why H bridge configuration with all mosfet as N channel mosfet. what is disadvantage with use of 2 p channel mosfet as High side driver and 2 N channel MOSFETs as Low side driver in H bridge application
hey Prof. thanks for the video . i dont understand what is Trise time. is it from 0V to max gate voltage we are going to give and at how much time it is going to go from 0v to max gate voltage we apply ?
good video, but a couple things I noted as I watched. Here's one, 32:22 there is no reason why you can't use two n channels fet's as a gate driver, it's just a half bridge and is common in gate driver ic's. 37:35 In fact the ir2110 has n-mos outputs. It's not bad with an x through it, lol
Hi Thad, thanks for comment. Sorry, you seem to have missed the point. 32, you can not use two n channels with a charge pump drive. Watch again the video.
@@sambenyaakov I didn’t miss anything and yes you can use two n channels in this way. the time index I gave is wrong it’s 23:22, you just don’t tie the gates together, you wire them as you would a half bridge just like the output in the ir2110 or ir2010.
Dear Prof Yaakov, thanks for this comprehensive tutorial. I only have one question: at 9:39, it is shown that the total charge Q can be read from datasheet but when I get into manufacturer data, I see that it refers to specific operating values for Vo, Id, Vgs which in general are different from the values in my application. Straightforward question: starting from datasheet information is there a procedure or even a rule of thumb to extrapolate Q for different operating values of the previously mentioned parameters ?
Hi John., thnks for note, The main correction needed is for a change in voltage. The others are really minor. AS a first approximation the length of the flat portion of the v=f(Q) curve is proportional to Vo.
thank you for your explaining. if there is only a mosfet, G is disconection and provide a DC voltage between D and S, is there any voltage appear at G due to Cgd and Cgs? if there is ΔV add onto DC voltage, how is the voltage of G. thank you!
Theoretically the voltage is due to a capacitive divider. But this is overtaken by the DC current leakages which will push the voltage to ground or supply depending on which leakage ( DG or GS) is larger.
@@sambenyaakov I didnt even watch the video to the end, and had an answer ;-). I missed that "heating the resistor while charging the gate". Thanks a lot.
Possibly the best explanation on the planet. Brilliant. Thank you Sir.
Thanks
This is THE best MOSFET driver tutorial on the internet. Thank you professor!
Thanks🙂
Yes
This is the best mosfet explanation I've ever seen, much appreciated.
Thanks😊
@@sambenyaakov Helllo, I appreciate also, I am following your explanations even if i am a "false beginner" (my true job is piano tuning and regulation/repairs). I think I grasp % may be, often going back until I have it, but my impressions is that it helps to shape my mind in regard of "what is a mosfet used for in the first stages of laptop alimenations " it make mosfet and drivers more familiar, I am sure it helps me ! Thank you
Thank you Prof. Ben-Yaakov, well-explained and very thorough. Videos like this help millions of students who cannot afford expensive books and after-school institutions. You are a teacher of millions: what a big class you have Prof. Ben? Thank you for running a school without boundries and with A-class level. God bless you and your team.
Thanks for warm words. Comments like yours keep me going.
Best explanation I ever found so far on RUclips, and from elsewhere (including some webinars from semiconductor manufacturers). I'll recomment your video to everybody who'd like to know more on this topic, and on my own videos if it comes the chance.
Thank you for posting, greetings from the Alps.
Thanks. I appreciate it.
Yes he is
One of the best MOSFET driver tutorials that you can find on the internet. As usual, clips of Pro. Sam Ben-Yaakov are very practical and his explanation is intuitive and can not be clearer. Watching hours of his lectures on RUclips saves me days on the labs. These are some of my favorites on his channels: PWM controllers (signature is peak control mode), MOSFET drivers, Ground looping, inductor/transformers. I just wonder is there any book that he has published which covers those topics, i definitely stock it up on my shelf
Thanks. No, have not published books.
true
This is by FAR FAR the BEST no bullshit down to earth explanation on the internet!!! Thank you thank you thank you.
This is by FAR FAR one of the BEST comments I got. Thanks.
Thank you Professor, I love how your videos are the perfect blend of applied engineering and theory/maths! Its very hard to find that.
🙏😊
8:30 is best explanation of Miller Capacitance I found out there. Thank you!
👍🙏
Such elegance in every depicted detail can only come about through a long experience of dedicated work. Congratulations and thank you for your presentations.
Thanks
Thank you, Mr. Ben-Yaakov. Easy explanation. You are talented teacher!
Thanks
Your explanation is simple, deep and educational at the same time. It's been a week that I try to find a solution to control the mosfets of a speed variator for three-phase Asynchronous motor. A floating power supply was essential, and the methods using transformers or optocouplers did not satisfy me. You just saved my life with this IF2110, thank you so much. In addition let me congratulate you on the English used, simple and concise while in the technical field I am more used to French.
Thanks for comment.
Informative, concise, well-explained... It is clear how much you really love teaching, and we all appreciate it. I am an electronics degree student and even though some of these concepts have been mentioned in class (while talking about converters) only with your explanation do I begin to understand how much there is to know about this subject. I am eager to rewatch the video with time and patience to really soak up everything you said. I would be happy if one day I would be able not only to interiorize the knowledge but to explain it half as good as you do. Thank you very much.
Thanks Davis for the kind note. Comments like yours keep me going.
ı am following you over 2 years and sir you are a really good person. because you are sharing with us amazing informations. ı respect you very much. thanks for tutorial. be safe.
Thanks. Comments like yours keep me going.
That is outstanding! I’m an electronics engineer and design power circuits. I have saved many, many videos on machining and other engineering topics to learn from, but this is the first electronics video I have ever felt the desire to save for future reference. Simply superb!
Thanks for kind note.
Thanks from Poland! Very interesting lectures, clear manner of transmission, information beyond the basics. Something like this I was looking for.
Thanks.
your video is very useful for pupil in confusion on MOSFET like me. now i am in settling my disturbance and do not afraid to observe at PCB of electronics and give advice for those who turn their face away from PCB. thank you sir !
Thanks for taking the time to write the comment.
Wow this is the best explanation on power tutorial I'm trying to build a two phase ---two three phase inverter. Thank you you cleared up so many questions i had...
Very useful presentation. I like the methodical approach of showing the problem and then a solution. It makes everything easier and show the real engineering and design process. Now I understand a lot of nuances better.
Thanks.
Thanks for taking the time to share your knowledge of power electronics Prof. Ben-Yaakov!
Thanks
Quality explanation. Great!! Lot of issues are addressed. Probably best on RUclips.
Thank for note.
I couldn't be more grateful for such an amazing video. Even if I am already graduated, this video helped me understand drivers better than any other lesson.
Thanks for taking the time to write the note.
Very excellent explanation, professor. I learnt a lot from your video series and got a better understanding of what is really happening in power generators. Thanks again!
😊
I love how you frame it from an engineering design point of view.
It seems obvious now that you have said it. I'm excited to read through all your series. I hope to be able to apply this knowledge at work soon!
Thanks for comment. Welcome abroad😊
Thanks for comment.
Respectable (or not) Niksa, just seen your comments. AS you know, I don't work for you so I really do not have to answer any of your questions. But, as a service to the community I do my best to answer queries that are sent to me. If you would repeat your question in a civilized manner I will answer (unless I miss the question as might happen considering the many questions I receive). Have a wonderful day.
'intuitive " is the word, your reasoning is so clear it is amazing how I can follow you despite being not real electronician, merely hobbyist trying to repair laptops tvs and other ! Thank you so much
Thnks for comment
@@sambenyaakov great you appreciated it, thanks. I have been lost after "gate power loss" (mainly I can understant the preambules of chapters, which is probably enough for me, but the following make me "loose the Arianne's thread" ;) ) of the explanations. Now wondering if I'd better begin by watching the 2 parts on Mosfet's datasheets , (or some other ?) what do you think ? Thank you again
Wow ‘DC restore’ , there is always some gold hidden in your videos thanks for sharing.
👍😊
Thank you for your detailed explanations, they are truly educational and practical. I feel like the fog has been lifted in my mind pertaining to this subject matter!
Thanks. Comments like yours keep me going.
Thanks for the nice explanation.
I have been testing some SiC NMOS and I prototyped a rig with some wires and terminal blocks to see how much switching frequency I can drive the mosfet to with air cooling. I have stray inductance every where of course since it is not a pcb. The circuit is a low side drive of a resistor bank, I observe a weird waveform accross Vds when with the falling edge of the pwm driver. It is not the typical ringing, it is rather a very high spike in voltage that is followed by negative voltage and then the typical ringing around the supply voltage. Snubbing is not getting rid of the first spike.
Thanks for sharing. A PCB with a good layout is a must.
Best preparation, thorough. This vidio will be on RUclips for hundreds of year.Big salute, Thank you.
Thank you. You warmed my heart.
your lecture is fantastic, it's very helpful to understand power electronics. thank you, dear.
Thanks (Korea?)
Very many thanks Professor for such a prompt reply. As always the more one finds out about a situation the complex it can become. Seems likely my problem has much to do with using 6 MOSFETs in parallel & poor dynamic current sharing. Variation in Vth can result in some devices switching quicker causing others to go out of S.O.A.. Advice appears contradictory as fast switching, am told, coupling gates using low or zero series gate Rg & hard switching helps reduce this effect. Am also told that parasitic oscillation can occurr for the same reason & increasing Rg & fitting your recommended Fe bead on each gate cures. In my case looks like some Rg value between these arguments is needed. Experiment is called for. Thanks again. Dave
Have you seen ruclips.net/video/Aq1Iw6ByXAw/видео.html ?
Your channel is gold, thanks Prof. Sam!
I appreciate that!
I used a form of that DC restorer circuit to develop a solid state version of a gate driver for a very large SCR that needs a many amps to turn-on quickly and reliably yet one wants that to be brief to reduce unnecessary gate power dissipation. Selection of a quality pulse capacitor that can handle that repetitive peak current turned out to be key for reliability.
Thanks for sharing.
Best electronics channel on RUclips by far! Thanks!
Wow, thanks!
You are a teacher par excellence, Professor.
Thanks for kind words.
Though I am late to ur lesson but it was marvelous...as an amateur I encountered tons of problems connecting to mosfets in simple and naive methods which by accident worked but mostly either not perfect or doomed to failure....ur a teacher....but a professional one....so many thanks
Thanks for comment
It is thorough tutorial both in theory and in practice. Thanks a lot.
Thanks
Best explanation I've heard so far! Thanks for the education.
Thanks
One of the clearest explanations of this topic I've seen. Thanks for sharing
😊
Very well explained Dr. Sam
Thanks.
Very great presentation, covers every aspect about MOSFET driving. Thank you for listening to my request!
Thanks. Will see what I can add in next videos. Thanks again for the encouragement.
Sam Ben-Yaakov Thank you for your effort, we highly appreciate it.
At 23:09 I believe Vt of both the PMOS and NMOS should be greater than 1/2 Vc.
This is preferred but many circuit operate with Vt
Very useful. Very good presentation.
Thanks
Amazing excellent course thanks for every minute of your time .... ❤
Thanks
Your videos are the best. I, as a Master's student of Power electronics, get most of my concepts cleared on your channel. Please explain the effects of body diode in MOSFET and how this varies when we use IGBT.
This issue is discussed in some other videos of mine. In short: the body diode of a Si MOSFET is a rather slow diode so there might be a problem of reverse recovery. IGBTs doe no have an intrinsic diodes so you can parallel them with fast diodes.
Could you please share the title of the video?
Go to
www.advicepoweracademy.com/video-tutorials
and search for diode
I omitted, in my question regarding fast turn-off diodes shunting MOSFET series gate resistors, to say that I do not know much about the original drive speed or frequency but I do know each Rg was 47R with no fast turn-off diode. My question really should have been is relability improved, maybe at a reduction of efficiency, by using a slower drive edges? I have attempted to comply with your recommendations with snubbers & safely limitted my device overshoot although admit I have not verified my circuit at the full 6kW. Thank you again. Dave johnson
Hi Dave, I have seen the two part of your query. Fast turn off could be beneficial to improve the efficiency. The 47Ohm will slow down turn on and hence help reduce the reverse recovery spikes.
Wow, it still helps people like me trying to overcome the ringring of the high side MOSFET.
👍
This was a very informative and well-explained video!!! Thank you sir, for the dedication u put into it!!
Thanks for taking the time to write comment.
Thank you very much professor!🙏
Your video helped me a lot.
Thanks
Sam,
Thank you for your explanation of the concerns of power mos gate driving.
I did notice one circuit that was given up too quickly. That was the p and n fet totem pole gate drive that was given up on because of shoot-through.
If the input gate resistor is moved from the power fet to the source of the driver p fet you get a fast turn off and a reduced turn on current which is desirable with out shoot-through.
Respectfully,
Ray
Hi Ray, Thanks for comment. Please indelicate which slide no. or video minute you are referring to. I am always happy to learn but I am not sure what you meant.
Sam,
I was not ready for such a fast response.
The DC-DC Converters page 8-18. The lower schematic of the cmos gate driver.
Thank you.
Ray
Good point if you want an symmetrical drive. In fact you can put two resistors in series between the drains of the drive FETs and connect the gate of power transistor to midpoint.
Clear and interesting explanation....Thanks a lot
Thanks
Great video. Detailed explanation of gate drivers
Thanks a lot
Thanks for comment.
What a superb lecture, thank you so much
Thanks
I've only just discovered this channel, but it looks to be a gem - a real breath of fresh air, with enough attention being paid to the underlying circuit physics to make genuinely useful derivations, as opposed to the vigorous hand-waving available on most RUclips treatments of the material.
However, I have a question: in your derivation of the Miller effect, starting from about 5:55, you seem to be claiming that the voltage across C_{gd} is V_{GS} + V_O.
From your diagram, the top of C_{gd} is at V_O and the bottom is at V_{GS} - I would therefore expect the voltage across that cap. to be V_O - V_{GS}
I am clearly misunderstanding something, but I can't see what it is - maybe I'm making a sign error somehow?
Thanks for comment. This is indeed confusing. Look at this this way: Looking from the gate, Cgd was initially charge to -Vo, and then charge to Vgs. So the total charge needed is (Vo+Vgs)Cgd
Indeed VER well explained from the first minute already! Excellent stuff, would be nice to have a PDF of this...
At 15:00, with this method, shouldn't there by a multiple of 2 for the switching frequency? Because every cycle you need to turn the element on, then off? Therefore you have to dissipate Q*Vgs twice per cycle, so the resultant formula should be *2* * f_s * Q * V_gs
No. Think about the energy that comes out of the driver (only at turn on)
@@sambenyaakov I see! I though about it some-more and realized the classic physics formula of energy in a capacitor is 1/2*C*V^2. Well at a fixed/constant 'V' if only half the energy is stored in the capacitor, the other half must be dissipated in the resistor. Both times charging and discharging through it. Not sure if that's the right way to think about it (kind of 'hand wavy' description) would you agree?
One of the best videos in youtube
Thank you
Thanks👍
I think is usefull use term "critical resitance" for oscillation. Critical resitance is Rcrit = 2*sqr(L/C) which give no oscillation beatween L and C, because it gave critical aperiodic course of voltage.
Thanks for great material, which take all important information in one lecture.
Thanks for comment.
I appreciate very much your explanations. I wish to ask you if middle trace in 11:02 should be falling instead of rising, given that Igate is positive. Thank you Professor!
Wow, you got me there. You are correct if this is the voltage on the MOSFET Vds
Hi, Sir Sam Ben Yaakov, really its your maturity in cool engineering.
Thanks.
Great explanation. Thank you for sharing your knowledge!
Thanks
This is great stuff as usual. Thanks for helping remind me how my HV motor driver gate drivers behave! Best regards.
Thanks
Thank you very much! Outstanding explanation, practical topics...
I really loved it....the drawings are too clean!!!
👍😊
Fantastic video, thanks a lot, it helped me understand gate charges, it has always been very difficult for me to realy understand.
Greatings from Denmark
Morten
Thanks
thank you very much from India.
Thanks
Great video prof. Thank you 🙏
Thanks
Boa tarde!
Gostaria de agradecer os ensinamentos que estou tentando em vários vídeos que você está produzindo. São os melhores.
Parabéns, ótimo trabalho!
Obrigado!
I thought I would try to use the IRS2186 "4A" banner spec to drive 2 HY1920P MOSFETs (4 total) and it's looking like the driver will need to deliver peak 3A.
Qtot=200nC, Vgs=10V, Vds=170V
Although in practice it gets boiling hot! It is dissipating around 2W of power!
Thanks for teaching me this!
What frequency?
@@sambenyaakov 300kHz
@@power-max Yes, the power dissipation is indeed far from being insignificant.
The best tutorials on power engineering!!
Thanks😊
I realy like your presentation and also, took notes. However, I'm designing a 144Vdc 6phase inverter at 100A to drive a dual stator PMSM that I've design and currently being built. Just when do we need to isolate (galvinize) the power side of the logic side? Is it just a question of preferences or is it most likely due to different codes or standards if an electronic device is intended to be commercialize ? For a start, I've decide to have a none isolated power and logic power and the choosen driver is the IRS21864PBF which does have a seperate logic ground (VSS) and hi volt power gound (COM) just as you explained and will have to be tie together. At least, I've got this part of my project right! Thanks.
Hi Donald, The purpose of gate drive isolation is not isolation per se, but ground separation. The grounds can (and recommended to be) connected at one point. Without isolation the digital signal reaching the gate driver (which should be close to switches) may and usually be corrupted due to the voltage drop along the ground. Some of this is partially covered in ruclips.net/video/uMe9qthcjS4/видео.html . If not confidential, love to hear about your dual stator drive and motor.
@@sambenyaakov Thanks for your answer. For now, I will stick with my non-isolated drivers since I'm exploring different options! My motor project is not confidential. I invite you to read here: openvolta.blogspot.com/ and my youtube chanel : ruclips.net/video/3U87w2zwoHk/видео.html.
I've not been very good at updating my blog or youtube channel. Since, there has been a couple of updates to design that has enhanced the torque and the efficiency. Theoretically, according to the simulations in in FEMM, it can reacht a maximum efficiency of 97%. It's not taking into account the mechanical losses. Also, according to research that I've read, the rotor design is prone to a lot of eddy current losses. So heat is expected and demagnetizing the PM is an other issue.
This motor is intedned to be a direct drive. It output 99Nm à 100A nominal. The copper losses are low. THe outer stator has 7 wound turns and the inner stator as 4 turns. At a certain point, the outer stater will not be injected with current and only the inner stator will be energized.
Again thank you!
@@donaldwright2426 Thanks for sharing. Interesting. Will study it.
@@sambenyaakov Here's my email donald.wright @ openvolta.org if ever you would like to have my raw data of the FEMM simulations. Also, thank you very much, and thanks you in advance if ever you do comment about my motor project. Best regards, Donald W.
Thanks prof.Ben for detailed lesson on Mosfet
Thanks.
Do changes in the depleted area during on/off switching of the MOSFET significantly affect the capacitance of Cgd and Cds?
great channel greetings
Thanks. I don't think so.
Thanks!! i like all your videos. im glad i can be your student on youtube. respect, sir!
Thanks for comment.
@1:27 after Q2(x axis) isn't it it charges only Qgs not Qgs+Qgd .. because till now all the app notes I have found everywhere it has been mentioned only Qgs not Qgs+Qgd ..
Correct me if I am wrong
You may be correct in saying that in the app notes you have seen, the charge is Cgs, but this is incorrect. If this charge would have been Cgs, why do you see the flat portion? This plateau is due to Miller effect caused by the charging of Cgd. All this is explained in video.
@@sambenyaakov Sir I am referring after Miller platue region ( at the end of Miller platue region Cgd charges fully) when VGS rises futher at that time only Cgs charges to reduce RDSon.....but in your videos it shows QGS+QGD both charges.
Am I making any mistakes?
@@biswajit681 Yes you do. Once the plateau ended Cgs and Cgd are in PARALLEL and both continue to charge (no Miller effect)
Thank you very much for sharing your knowledge in such a structured manner! I'd love to be your student at the university :)
How about a high side switch that gets Gate Drive from the High Side Voltage and is switched by an NPN transistor to GND. Not isolated, but you don't always need isolation
Possibly. Have you seen: ruclips.net/video/_BgdxMW3HlQ/видео.html ruclips.net/video/MiiMun66f78/видео.html
What will be the ratings of high side Push-pull fets/bjts acting as gate driver boosters to an igbt based h-bridge if Input to h-bridge is 600v. Should they also be of 600v or less. Plz reply urgently if my question is not clearly understandable to you. You are explaining it at 22:30 time in this video
The pus- pull driver transistors rating is related to the drive voltage - not total voltage .
@@sambenyaakov Thanx sir
Can you tell me when does one choose a gate driver IC or a discrete solution ? Further videos on gate drivers will be apreciated.
IC drivers are the best but when cost is an issue, a discrete solution might be more cost effective,
Sam Ben-Yaakov
so a gate driver ic would be the best for efficient control.
Excellent lecture series!
Thanks.
Thank you very much for detailed explanation.
🙏😊
Learn a lot from this video! Thank you sir!
Hi Dr Sam thanks so much you are very smart and wonderful in teaching, i have question about IGBT, how can i get ride of the problem of higher dv/dt, turning IGBT off with negative voltage does is not effective , so how i can prevent IGBT from blowing up due to dv/dt.
Thanks,
Thanks for comment. The simple way to controls dv/dt is by increasing gate resistor.
Thanks Dr. Same, but the switching losses will increase, is there another solution
You can use a turn off lossless snubber. This will decrease dv/dt.
thanks for excellent lecture.One question at 18:53 how voltage at emitter of PNP is -VT?
Thanks. MOSFET is enhancement mode N channel so it is positive threshold
Professor, any chance you could do a video on dead time, and how to achieve it for 3 phase inverter circuits. Thanks
What do mean by "how to achieve it"?
@@sambenyaakov I mean how to determine how much dead time is required in order to avoid shoot through when designing half bridge, H bridge or 3 phase inverter circuits. e. g. In a situation where you have high side and low side MOSFETs. Also is dead time implemented in code, hardware or both? Can it be calculated? if you could do a lecture on this matter that would be great 😊😀
OK. Got it. This is indeed a good topic but not easy as there atre many caveats. Will see. Thanks for your suggestion.
Thanks for the informative talk.
Just a question, if you are open to talking them - Once the Gate capacitors charge enough and it starts conducting - how is any additional current flowing from the driver supposed to be handled (Lets say we wish to maintain that position for long). Is the resistor @ driver supposed to sink in all that excess charge or the grounding resistor would start to share it?
Happy to answer. For the MOSFET to conduct, there is no need for a current. Once the gate voltage is above the threshold it will conduct. The driver charges the gate until the gate voltage equals the driver's output voltage and the current flow will stop, save some bleeding if the is a resistor between gate and source.
@@sambenyaakov Thanks.
I have a Power MOSFET - IRF1404 which requires total gate charge of 196nC but the driver I have in mind (2N7000) has Max drain current of 200mA. Do you think it could drive the Mosfet easily - actually it needs to drive 4 such Mosfets in parallel. Individual drivers to each Mosfet is the way to go or should this single one be enough to drive all of them in its sweet time?
@@royalsingh A single driver can drive the 4 transistors. Think about it as a voltage source charging four capacitors in parallel. But... the turn on time will be relativity long so if the switching frequency is high you will have heavy switching losses which will heat up the transistors. If you use one driver better to use separate (series) gate resistors for each. There are drivers with much higher current.
@Sam Ben-Yaakov Brilliant! Many thanks for your suggestion. Switching frequency is almost negligible, they would be utilized to switch a BMS input supply. Have a Good Day!
Excellent explanation! Very well done!
😊👍
Hi, thanks for video. i have question --> can you please explain effect (positive , negative)of body diode of MOSFET in H bridge application(consider all four are N channel MOSFETs). Also why H bridge configuration with all mosfet as N channel mosfet. what is disadvantage with use of 2 p channel mosfet as High side driver and 2 N channel MOSFETs as Low side driver in H bridge application
Very useful. Thank you, Professor.
😊
hey Prof. thanks for the video . i dont understand what is Trise time. is it from 0V to max gate voltage we are going to give and at how much time it is going to go from 0v to max gate voltage we apply ?
Thanks for comment. Trise of what?
@@sambenyaakov at 11:27 prof
Hello Dr. Yaakov, can you please upload something on double pulse testing explanations, pitfalls etc. ?
A good subject. Will try.
good video, but a couple things I noted as I watched. Here's one, 32:22 there is no reason why you can't use two n channels fet's as a gate driver, it's just a half bridge and is common in gate driver ic's. 37:35 In fact the ir2110 has n-mos outputs. It's not bad with an x through it, lol
Hi Thad, thanks for comment. Sorry, you seem to have missed the point. 32, you can not use two n channels with a charge pump drive. Watch again the video.
@@sambenyaakov I didn’t miss anything and yes you can use two n channels in this way. the time index I gave is wrong it’s 23:22, you just don’t tie the gates together, you wire them as you would a half bridge just like the output in the ir2110 or ir2010.
is it possible to calculate only the driver efficiency?
Conducion losses, yes, Switching losses, try to consult the data sheet.
Sir, Do you have Totem Pole Circuit and MOSFET video?
Please search my RUclips channel "Sam Ben-Yaakov" there are some.
Dear Prof Yaakov, thanks for this comprehensive tutorial. I only have one question: at 9:39, it is shown that the total charge Q can be read from datasheet but when I get into manufacturer data, I see that it refers to specific operating values for Vo, Id, Vgs which in general are different from the values in my application. Straightforward question: starting from datasheet information is there a procedure or even a rule of thumb to extrapolate Q for different operating values of the previously mentioned parameters ?
Hi John., thnks for note, The main correction needed is for a change in voltage. The others are really minor. AS a first approximation the length of the flat portion of the v=f(Q) curve is proportional to Vo.
@@sambenyaakov Thanks!
thank you for your explaining. if there is only a mosfet, G is disconection and provide a DC voltage between D and S, is there any voltage appear at G due to Cgd and Cgs? if there is ΔV add onto DC voltage, how is the voltage of G. thank you!
Theoretically the voltage is due to a capacitive divider. But this is overtaken by the DC current leakages which will push the voltage to ground or supply depending on which leakage ( DG or GS) is larger.
so, in general, we need to connect a resistor between G and S to force the voltage equal to the potential of S? thank you!
@@陈友敬 Indeed
Dr. Sam. regarding Ton of MOSFET you mention at page [8-9] ,can I find this data in MOS datasheet or calculate it? Thanks!
Ton is in fact the rise time YOU want. To completely charging the gate.
@@sambenyaakov Dr. Sam. Thanks for reply, on the other hand, it means if I set driving current of MOSFET,then Ton time can be calculated,right?
14:35 i think this is wrong. When i turn on the mosfet, it use power from the driver, but when turning off, i just get rid of the charge?
The isse is not power from source but the power dissipated. At turn off same power is dissipated, in resistor and driver, as in turn on. .
@@sambenyaakov I didnt even watch the video to the end, and had an answer ;-). I missed that "heating the resistor while charging the gate". Thanks a lot.
I have a question, does bootstrapping limits switching frequency?
The on time should be sufficient to charge the cap.
@@sambenyaakov on time is 49% and off time is 51%
@@vidtechnology7342 the bootstrap charging TIME should be sufficient