MOS Transistor | Common source stage with resistive load | VLSI | Lec-62

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  • Опубликовано: 5 ноя 2024

Комментарии • 4

  • @waferlayout
    @waferlayout 10 месяцев назад +1

    Much appreciated Sir 😊
    Easy
    CS:
    Av=(uvi/1+u)*(RL/(ro+RL))
    u=gmro
    Ri=infinity
    Ro=ro//RL

  • @Rushi_Tales
    @Rushi_Tales 9 месяцев назад

    Hi sir
    Could you please do vedio on common source stage with current source load
    As your explaination is easy to understand sir

  • @lakshmanlucky07
    @lakshmanlucky07 Год назад

    😅