This is the simplest and most comprehensible lecture I watched. I've been reading it in my book but through this video I understood it most. Thank you so much.
Great video. It's so instructive. I have a question. Some authors say that PC is incremented in step 4 (fetch/decode/execute/write) but others say that it's the final operation of the first step (at the end of fetch). If I think about pipelining I would say that PC is incremented after fetch but I'm not sure. I suppose that it depends on the architecture of the CPU but, someone knows nowadays what is the most used approach? Thanks in advance.
I've only studied for A Level, but I would say go with the PC incrementing/jumping after the instruction has been fetched (i.e. has been put into the CIR) because the next PC value is decided by the previous instruction (possibly before it has been split up and executed). Also as you mentioned, this would need to be the case for pipelining. There may be some confusion because of varying architectures between CPUs, like you said (although most, if not all, processors use pipelining now).
This is the simplest and most comprehensible lecture I watched. I've been reading it in my book but through this video I understood it most. Thank you so much.
Respect this man, teaching from the astral plane
Beautifully explained. I love it!!
Good video to understand what pipelining actually means.
But you need to know the MIPS ISA to really understand this.
simple, straight to the point! nice video
Way better representation of pipelines than what is traditionally used!
Looks very simple with this explanation. Thank you!
Man you explain and teach really good! Took me one time to watch and understand
This is a good explanation that is very easy to understand.
First video ever seen with transparent hand & pen
Excellently explained!
Oooooh so that's the way it works. Thank you my friend
simple explanation thank you very much
Great video. It's so instructive. I have a question. Some authors say that PC is incremented in step 4 (fetch/decode/execute/write) but others say that it's the final operation of the first step (at the end of fetch). If I think about pipelining I would say that PC is incremented after fetch but I'm not sure. I suppose that it depends on the architecture of the CPU but, someone knows nowadays what is the most used approach? Thanks in advance.
I've only studied for A Level, but I would say go with the PC incrementing/jumping after the instruction has been fetched (i.e. has been put into the CIR) because the next PC value is decided by the previous instruction (possibly before it has been split up and executed). Also as you mentioned, this would need to be the case for pipelining. There may be some confusion because of varying architectures between CPUs, like you said (although most, if not all, processors use pipelining now).
What if the first instruction is a jump? If the PC changes before execution, it won't register the jump
Very helpful. Thanks
You see yuri processor work faster if we dont make it to wait for one instruction to end
thank you! great video!
Good video!
Very clear, thanx 😄
So this instruction is total time of 36ns ?
This is 🔥
Thank you!
Nice video
great vid
Thank you.
thank you
thanks
Create some circuits! Arrive at androidcircuitsolver on google
wow
all this time i thought pipelining was a bad thing 💀
thank you