You have done great work. I dream to do something similar with shift registers to drive vga display, but I am generating sync signals PIC, but that is slow to generate whole vga picture. Continue your research, I am waiting for next part.
Makes sense that pixel 4 is turning on/off when I switch bit0. I'm triggering the pixel load from bit3 of the horizontal counter which will trigger at binary count 100 which is 4 in decimal. So I'm thinking I could use a 3-input NOR gate. This should give a trigger pulse whenever bits 0, 1 & 2 are all low. So for example 0000 0000 (0), 0000 1000 (8), 0001 0000 (16), 0001 1000 (24), etc
You have done great work. I dream to do something similar with shift registers to drive vga display, but I am generating sync signals PIC, but that is slow to generate whole vga picture. Continue your research, I am waiting for next part.
Makes sense that pixel 4 is turning on/off when I switch bit0. I'm triggering the pixel load from bit3 of the horizontal counter which will trigger at binary count 100 which is 4 in decimal. So I'm thinking I could use a 3-input NOR gate. This should give a trigger pulse whenever bits 0, 1 & 2 are all low. So for example 0000 0000 (0), 0000 1000 (8), 0001 0000 (16), 0001 1000 (24), etc