Well thanks for your series and making the code open source! In part due to your comments I've started work on a simulator so I'll have the means to distribute a functioning build sooner or later (Sooner = less polished interface).
Seeing such a striking difference between machines that need multiple cycles per instruction and one which can (occasionally) reach the limits of scalar thruput is quite incredible
WoW! This reminded me of my BS graduation project in 1998 when I designed a RISC pipelined processor and wrote an assembler for it along with an emulator. The tool was used as an educational aid for freshman students in computer engineering department.
@@weirdboyjim its from one of the logic boards that surround the inner column. It's not a complete piece, but I'm mostly certain it's part of what ever goes for the cpu part. Whatever it was is hard to tell, cray 1 was very modular. Don't know if element of that, or a part that was prone to more heat and failure. Why else design it so it could be easily swapped in or replaced.
Curious to find out how fast you can clock this. Lovely processor, I feel blessed I was able to watch you bring it to life. Bringing this over to VHDL could immortalize your design. OpenCores comes to mind.
Some people are already working on an FPGA version. For the clock rate I'm very interested in understanding any architectural limitations with regard to this. The ultimate limit will be the memory chips though, they tend to be slower than other things.
@@weirdboyjim Isn't that something that you could just try by using i.e. a function generator instead of a crystal as your clock source and step up until a test fails?
@@maeanderdev temperature is also an important variable. I’m no expert but these things are usually best done as a paper exercise vs a practical one where subtle differences in particular parts which, by luck and not design, deviate from their specification.
Congratulations, those are really impressive results! You should indeed be proud. I'm still surprised that, after so many videos, the subscribers and views on this channel aren't at least an order of magnitude larger. Thanks for all the great content!
Thanks Crul, I appreciate the kind words. To be honest, I'm happy that people watch and find it interesting. I suspect I lack the personality type and presentation skills to make it really big.
@@weirdboyjim From what I've seen, I'd say the ways of RUclips's mighty algorithm are unfathomable. You can, and should, be proud of the content, in quality and quantity. Regarding the numbers, good luck! It's mostly out of human control :)
@@weirdboyjim don't sell yourself short here. It is great to have a channel that doesn't give a sensory overload, that focuses on the actual topic and from which one can learn something new. I don't think there's any issue with the presentation or your personality. It can be just almost randomness with the algorithm, or maybe it is a bit niche topic (where the communities tend to be smaller but also tighter) or anything like that. Most channels also have a small call for action in each video to remind people to subscribe, hit the notification bell and leave a comment (afaik that helps a lot with the algorithm), and if I remember correctly, you don't have that (writing on a phone so can't check easily right now). Maybe also adding a little teaser about what's coming up next (though I think you've already done this usually). Or just ignore the stats and focus on producing more of the great content.
@@fintux So adding Like and Subscribe has an effect on the RUclips algorithm? Explains why everyone has it, despite you only having to be on RUclips for 10 seconds to workout the purpose of Liking and Subscribing!
Glad you liked. Sometimes I let bits of code I'm working on run in trace mode for a while just to get a visual feel for how well I'm using different parts of the cpu.
Thanks for your hard work! I really wanna see where the project goes (and future projects)! I know this won't go too far with the costs, but I'm sure you'll put it to good use!
@@weirdboyjim I appreciate the videos! Please, use the money to buy more ICs, solder paste, connectors, and PCBs, or, packs of pens for the next design! 😂
Congrats on the 100, and congrats for the inofficial crown in performance. Reminds me of the crazy headaches we had in the 80s to create some nice pixel graphics ...
My dad won a contest with him early EGA so 16 colors, The software was called Dr Halo I loved playing with it but he created this graphic practically pixel by Pixel and it was amazing ended up winning some kind of contest and we got like free meals at expensive restaurants and all kinds of other stuff for the family it was pretty cool and when I think back using the tools we have today it makes it all that much more incredible because it didn't feel like 16 colors. The machine was an IBM clone 286 that had the math co processor. It was 12 megahertz but it had an absolutely astounding 2 megabytes of RAM and eternally pissed me off because Wolfenstein would not run on EGA but I know it could run on the 286 with VGA.
If I understand this well, (similar to) this could have been built back when the selected CPUs were the stars and this compares really favourously. Huge work in outperforming the 70s chips with discrete logic - likely an achievment for life! Keep on good work!
Yeah, most of the logic chips were there. Memory chips were more of a problem, we are spoiled now. Each of my chips would have been several with a demultiplexor to select them.
Very interesting, the artificial NOP and instruction fetch stalling very well demonstrates why an instruction cache is needed, especially for a superscalar CPU.
This is a fantastic labour of love, James. I've been binge-watching the whole series including the VGA implementation over the last 2 weeks and finally gotten to the end. I've really enjoyed your journey with logic, layout, soldering, video editing and presentation. All done with a good dose of British self-deprecation! Your presentation skills are excellent in my opinion. Certainly they are superior to many university lecturers I had on the same topic back in the mid 90's! :) Your coding skills are head and shoulders (and then some!) Above my own but I share your curiosity for just how far ideas can be taken using the hardware of the day and newer ideas. I wrote down a list of about 10 ideas (for improved signal integrity, latency reduction, stability) and another 10 architectural ideas that were used in the 8-bit days (almost! ;) ) that could give your project another huge performance boost. Probably way too much text to drop into a comments section so perhaps let me know if you're interested.
Thanks Stewart! That's some high praise! I'm a curious about your ideas, but I have a huge pile of ideas myself which I have to hold back on in order to keep going with this one. My current plan is to get this build finished roughly with the current plan and then embark on a new project. Needless to say more ram, less memory contention, more gpr's and better addressing modes are high on the list.
A very impressive result and a great 100th video. Shows how pipelining is far more efficient at running code than micro-coded CPUs. I watched the 8-bit Battle Royale when it first came out and wrote a Mandelbrot for the CSCvon8 and got it to do 32x22 with max 16 iterations in about 2 seconds running at 6.3Mhz. Took me quite a while to get the 16x16 bit multiply to work but when I got it right it was magical to see the Mandelbrot set draw on the screen the first time.
@@weirdboyjimThe code isn't very optimised but the CSCvon8 'cheats' as it has a big ALU ROM with 8x8 bit multiply instructions, which helps a lot in this case. I've also got 160x120 with 64 iterations to finish in about 2 mins.
The pride you exhibit regarding this computer is VERY justified! Your work will not only help many people in the future understand the low level details of how computer systems function, but will also show the magic of following a dream and making it reality. If I had enough thumbs you would get a ten thumbs up from me for this series. (I think it is probably the best digital design series out there.) I'm personally not surprised at your results on the Mandelbrot set. The old 8-bit CPU's were designed either to fit what technology of the day could cram into a single chip, or were designed to a price point. It would be interesting to see how your processor stacks up to even some 32-bit processors of the day, like the Motorola 68000 or even the first ARM processor. I think you might beat the 68000, and come in for a close second to the ARM chip.
High praise there Dave. Yeah, comparisons are difficult. The microprocessors we are comparing to here were revolutionary not for performance but for being a big part of bringing the entry point right down.
It's got to be the fastest 74 logic 8 bit surely ?. And to say it has been designed, built and programmed together with VGA, sound, and UART, again all by 74 series logic by just one man is extremely incredible. I would suggest naming it _"The Sharman 74"_ . The series has been brilliant from start to finish and I will watch them all again. Fantastic. 👏👏👏👏
Congratulations, that's an amazing result. It does make me wonder what sort of speeds would be possible if the CPU could be fabbed on a comparable process. Oh, and happy 100th video in the series.
Thanks Quxxy. Well we can predict the speed at a higher clock rate, but I'd more more inclined to refine the design further before chaining the format. Some of my choices are more suited to describe chips than a more compact implementation.
So the true race is IPC, not MIP. This is a pretty impressive result for a single pipeline single alu cpu, a more dynamic register file with an in-pipeline register renamer would boost it a bit, so would a dual headed ALU. I’m also starting to understand why so many CPUs did a multi bus design instead of a main bus.
It's all interrelated. Mips is IPC times clockrate. It's even more complicated when you think about the instruction themselves. In my cpu for example, if I want to set A to 0FF I could do either "mov a,0FF" or "xor a,a","dec a". Both will take 2 cycles and use 2 bytes of memory. The first one however is 1 instruction and the later 2, which is better? I could fudge the results a lot like this so in the end the only real test is to do something serious and see how long it takes. Hopefully the results here speak for themselves.
@@weirdboyjim the only real way to measure instruction effectiveness is with real world examples, which is why I’d only trust a branched jump table implementation as a measure, because it’s probably the most common bottlenecking pattern in software design. Edit for clarification: a branched jump table that utilizes pointer arithmetic
Great to see the results here. I was a Z80 man myself in the 1980's, with the likes of TS1000 (AKA Z81) and Spectrum 48 within my repertoire of experience. I went straight to an IBM clone after that during my CS studies, but the Spectrum gave me lots of pleasure. One of my favourite games was Basil the Great Mouse Detective, chess, and a few others. Wrote my own 3-line editor. I tried making a full-screen editor, but it was painful watching the screen repainting after each keystroke. 3 lines were perfect. Boy what a trip down memory lane and I have you to thank for that James. Will you be re-inventing a sort of hard-drive for the computer? I would watch such a series. At this point I almost think you can build anything.
Ahh yes, you mean the ZX81, in hindsight it's incredible how little extra they managed beyond just the cpu to keep it cheap! I assume the editor was in basic? Really needed at least the screen update routines in assembler.
@@weirdboyjim Yes all of it was in Basic. One of the most useful feaures of the Spectrum basic was the fact that you could use a variable in place of a literal line number. This means that when you needed to branch to a sub at line 100 (say) to do screen update, you could at the top let screenUp = 100 and when you needed to call it use Gosub screenUpd. It may seem trivial, but it made the code easier to write and read. I still cannot today figure out how I learned to write code in a language without If then and else. There was no else in basic...??? Admittedly I only learned that construct later when I lerned Pascal as part of my CS course. It took a few days to write the editor and when I later refined it, I could save documents and read them using my editor, and print them out. 48K???
100 episodes! Ace! You went from something to watch when I was bored in hospital to one of my favourite RUclips channels in about 3 episodes. Keep up The Great Work! :) In "the great debate" at college, we always said the BBC beats the spectrum and the 64! When they break down into CPU type, it makes sense.... Lots of pipelining wins, and smidge of pipelining comes second, no pipelining loses. Shame, I was always quite a fan of the Z80 back in the olden days. When I'm in 8-bit land, I'm doing assembler on AVR microcontrollers... it'd be very interesting to see where that would come in the leader-board.... need some way to get VGA out of it without eating every single one of it's clock-cycles though.
@@weirdboyjim 🤣🤣😂 I have the sanity to limit that madness to occasionally making a 6502 from a kit. I am not by any means good, but I am slowing learning 6502 assembly from YT. i had a C64 and a NES growing up and they made me fond for the 6502. The Z80 is another great cpu though. Added the word learning
This is such a cool series. I've not gotten to watch everything yet, but working my way through it. I've managed to get a good handle on basic CPU design, but pipelining was always just out of my grasp. Thanks for showing us the work!
A great video, and a great way to mark the 100th episode. Mandelbrot plots are always cool. It's fascinating how the incorporation of pipelining improves the IPC performance compared to machines without it. Of course, un-rolling loops and similar tweaks can also help further if the algorithm allows and one has the patience. ;)
@@weirdboyjimKind of like ARM, where Sophie both programmed BBC basic, and also the instruction set for ARM, without anything too unnecessary. I'm sure they also got input back from the implementation for what's easy or not. If you ever get into another build, I'd love to see perhaps a standardized ISA like RISC-V or MIPS or some such, made into a homemade CPU. The instruction set and architecture are a lot more disconnected than you'd really think, when you get more advanced.
What a fantastic project and an awesome achievement. It's hard to believe that this was how early processors were designed and tested, with lots discrete chips on boards, all spread on a desk. It's even more amazing that today, all of that can be fitted in to a tiny little package smaller than a fingernail and can be purchased for pennies. My first computer was a Sinclair ZX81, which I thought was a miracle of miniaturisation. 😁
Excellent result! Some of my first computing was on a CDC6600 which had pipelining and some asynchronous operations - did 3 MIPS but with 60 bit words and core memory. One of the most important architecture inventions in the 1960s was of memory cacheing - why not give that a try? If your code is doing a lot of localised fetch/store ops it can help a lot to resolve the cpu/memory speed mismatch.
This CPU is reaching the boundary of it's designed parameters. I plan on future builds that will experiment with more advanced concepts but I don't want to keep iteratively redesigning this one, that's no way to make a nice clear architecture. A cache for example needs logic that can handle a cache miss everywhere you are accessing memory, as a retrofit that is tough.
@@weirdboyjim Yup, understand that. Also it depends on the memory interface and how it’s architected - if it’s synchronous and just waiting for the data to show up or getting on with other stuff meantime.
It's amazing that you can out perform a CPU chip with all the transistors packed together with your CPU with the components spread out over 10s of cm. Fantastic project. And your presentation skills a perfect for a project like this.
Wow, this is really impressive ! I really love your attention to detail when you explain things and I really love coming back for the know-how you share. I benched my own version of the X16, and it came in exactly as predicted, running at a simulation 4Mhz with no other real hardware than a 65C02 CPU. But your 1.3 is just so out of this world comparably.
@@weirdboyjim I've done some experiments to find out more of how it's supposed to work - since I don't have a real vera, I need to go by the emulation code that is freely available. I'm currently spending way much time getting the simulation to work like hardware, and getting the hardware to not notice the simulated bits.
Wow! thats so cool 😎 james.. I have always had day dreams wondering how far 8 bit could be have been pushed without 80s budget constraints so anything like this I find fascinating.
If you want an indication, look at the history of the ARM processor. Okay, it is 32-bit, but then if you are chasing performance, you don't stay with 8 bits. 25,000 transistors, virtually no budget, very few resources, but 2 really smart people.
Congrats on the 100th, love your work.There is a modern Z80 called the eZ80. It can run at 50Mhz and has a 3 stage pipeline. I wonder how it would do running the Z80 version of the benchmark. One day I will have to give it a try,
I'd be interested to here. I imagine it will trash me, especially at that clock rate. That was kind of the point I was making, I compare well against the decades old devices of my youth but I have no illusions against anything designed more recently by an expert.
@@weirdboyjim They absolutely do! I had been considering working up to the same sort of project myself after watching Ben Eater's videos. I'm sure I'm going to learn a lot from your experience. Thank you so much for sharing!
Awesome job and fantastic series. I am especially amazed at the way you approach things and how you managed to bring you original design to reality. Like I heard someday in a movie which name I cannot even remember : „I like how your brain work“ ;) very inspirational! Thanks a lot for sharing it all. And please go on !!
I suspect those modern AVR's and some of the PIC's maybe faster, especially at higher clock rates. The PDP-11's were 16bit devices but I don't know a great deal about their performance characteristics.
@@weirdboyjim it definitely will! I'm still strapped for time this week, but I'll be back on it in the next few days! As soon as I have something worth sharing, I'll be in touch!
Just found this channel, and I've been binge watching the series. It's amazing. I hope when it's completely finished, this computer is offered as a kit as an education resource, the same way the Cerberus 2080 is. It could be an amazing resource. I'd love to assemble one and learn from it. I would also love to know if this design can be implemented using CPLDs or an FPGA. Cheers!
Certainly you could do most, if not all of this on an FPGA, though a single CPLD would probably be far too small. There's a few folks on the Discord that have written PC emulators for it as well.
@@awesomecronk7183 Thanks for the info. Yes, I was not implying just one CPLD, but several, each with a role. I’ll join the Discord, but I despise the platform, since it’s closed, and the info not publicly available the way forums are. A lot of valuable information is being put there, and you can’t find that using a search engine. Pity it’s replacing the more useful forums…
@@damianvila I agree about that, but Discord does have it's uses. For one, it's far faster-paced than forums are, since chatting is real-time. That said, it's like having a conversation at my house, vs writing down our messages and posting them at the library. Yeah, it's harder to share that conversation with the world, but you can communicate in real time, so a lot more gets done. Fortunately, I don't think it will ever fully replace forums.
I've been following this project for some time now (not from the first, but close enough). I know you've tightly focused on your original objectives -- 8-bit, pipeline, SSI TTL-compatible chips for most everything in your CPU proper, but using LSI EEPROM and static RAM because life is too short to try memory solutions from TTL's heyday. That said, you have augmented your design with very useful hardware I/O. Have you considered adding a simple EEPROM (or, better yet, shadowed ROM in RAM as you do for your too-slow EEPROM) precomputed lookup tables for 8x8 multiply and maybe scaled fixed-point reciprocals, square roots, trig functions, etc? Allocating some registers in I/O space (or memory-mapped I/O) for a sort of table lookup maths coprocessor could be very interesting for increasing performance without adding complexity to the CPU. You are already using various sorts of LSI ROM & RAM techniques, so this would still be in the original spirit of your objectives. You needn't add more than one such lookup table at a time, as long as you have some unassigned I/O ports left. Multiply would surely be worth it, and reciprocal lookup does away with much of the heartburn and many, many cycles of long division. Most division problems in your use case would be reduced to finding the reciprocal of the divisor, multiplying that by the dividend instead of doing regular division, with either pre- and/or post-scaling to get the significant digits you require.
When I finalize the build I may show how we can reorganize the instruction set to make simplifying the pipelines possible. I could indeed add the kind of hardware you suggest, might be an interesting side project but I was aiming for a good general purpose throughput, It's possible to speed up just about anything with a lookup. Multiply is much easier to get right than a divide though.
Dude, this machine is incredible! And at 100 parts no less?! How did I miss this??? Regardless, I hope you keep up with making this the One Computer To Rule Them All! ...my question is: what will this incredible miracle be named once it is all completed?
Fascinating work. I'm surprised your processor - spread across your desktop - is faster than the classic 8-bit. I also appreciate the 'normalized' performances. I was surprised the Z-80 performed so poorly. Congrats on a great result. I'm subscribed - continued success!
@@devcybiko RUclips won't let me post a link but you can search for "Z80 ALU" and look for Ken Shirriff's blog. The Z80 Wikipedia article should mention it too, if it's worth it's salt. Obviously, all designs are compromises, but this seems like an odd trade-off to me.
WOAH!!?! Brings me back to my Intel 8051 microcontroller frustrations! The Assembler / development environment / ‘emulator’ ran on a DOS terminal. And so it was always a riddle to me, whether the ASM program was really yielding clock cycles and values that were true to not just it’s own software programming, but if whether that software was seriously delegating every 8051 resource appropriately, in the same order, initializing it’s registers, clearing its carry(s), setting up for parity, etc etc. And doing this initialization process just as some specific microcontroller’s data sheets had described. I find it rather amusing, the remaining two camps still to this day, who either prefer the clock’s ticks to be left up to X-tal wiggles, or by way of the RTC, driving those cycles over Transistor-Transistor-Logic. It seems to me That the TTL solutions are better geared for say a clock radio or a microwave oven, and the crystals are something that I would have to hand and so I’d grab it. THANKS A BUNCH FOR SHARING THIS, VERY GREAT LECTURE!!
@@weirdboyjim Well that's just the thing, look at the complexity of what we consider a simple system or simple architecture today. Yet this younger generation they were practically born with a super computer in their hands that we can put in our pockets. It amazes me the things we end up taking for granted. And many people does not care how it works only that it does and a lot of them have no appreciation for the engineering, time, and hard work that many had invested over the years to build such things.
Hi james. Amazing 100th. Have you looked back at your first videos ? It's amazing what you have achieved. Both in terms or CPU and in terms of video quality and editing. Looking foward to the 1000th 😉
Matt should have add your benchmark score. Don't get me wrong i love his channel too. But did he give a reason why? Don't understand he does have the X16 in his benchmark that even use an FPGA. I love it that your cpu/homecomputer is build out all on discrete IC's. If your project is finished i will probably order the kit. Nice job James.
I respect his decision on this, it's his series after all. The benchmark gave me a nice way to compare my cpu against other systems without a massive amount of effort.
That would be great to have but it's an order of magnitude more complex as your assembler needs to be given a far deeper understanding of the processor workings. It would be many times more effort than for me to just hand tune the critical code.
I'm thinking that if you wrote a CPU book it might be a fulfilling next direction for your project, and many people might be interested. It could be written in parts and published on Amazon KDP , with each subsequent edition adding more content to previous editions - this way the first edition might be 200 pp or even less, and expanded to a longer book overtime. I'm mentioning this in case writing a book might be a fulfilling path for you on which to continue the CPU project. I wrote a book on Analog electronics in the same way, now it's on the 3rd edition, and hopefully the 4th is not too far off. I've had about 300 books sold in a year, but in your case, I think it'd be quite more popular (as for one thing more people are interested in CPUs than in Analog).
Wow, I can see that being a bit of a big time commitment. To be honest I'm not sure I would be very good at it, I'm Dyslexic which normally goes unnoticed but it might take me a long time to get thoughts down in that format.
@@weirdboyjim in light of that your achievements are more impressive still. You know, I mentioned the book just on the chance that's something that you might find inspiring & fulfilling if the possibility was suggested to you. If you feel that's not your thing, then of course, especially when considering the time investment that would be required, it's probably best not to veer into it from the present format, which anyhow conveys to the audience a lot of what a book would have conveyed. For me personally, the idea of a book was more exciting so I pursued it, but then again I wouldn't have had the talent to make interesting RUclips videos..
This is stupendously good! Blows the hat right off the Commander, and running at 4MHz no less... Now I really want to go back and watch how the pipelines work. Also I do wonder how much FPGA space an optimized version of your architecture would require. And I kind of want to try writing code for it!
That's really fantastic. It may be an faq but since you have most of the logic transferred from breadboard to pc's, do the Gerber/Eagle/kicad files exist somewhere? Or even the schematics?
It's on the channel description page. I do my design work on easyeda so my profile there (or on oshwlab) has everything I've made public. I tend to release stuff after I've tested it working. Poke me on discord if I haven't released something you want to take a look at. oshwlab.com/weirdboyjim
The 6502 clock speed is a bit misleading - it uses a 2-phase clock, effectively doubling its internal cycle rate in some cases. Conversely, the Z80 (and others) effectively generated a multi-phase clock from a single oscillator. Taking that into account, you can see that they are pretty close to each other. Both are blown away by the pipelined cpu - I didn't appreciate just how much of a throughput boost pipelining gives. If you had more RAM bandwidth you could get a fair bit more throughput in some conditions, with a single stage look-ahead buffer. But at that point it starts to get really complex (as if it isn't already).
Yeah, performance is a very difficult discussion point. This was a pretty short video where I didn't want to go too deep so the point I wanted to get across was really "it's more than just MHz". Truth is the most important performance metric is how fast can it do [thing I need to do].
Most Arduinos are 8bit and run at 16 Mhz, but there are many registers (about 30) and extended instruction for 16bit math (like adc and ror (rotate with carray)), there is also the stm8 series which runs up to 24 Mhz.
And the AVR8, like the original PICs and clones, are Harvard architecture processors. So accessing data memory does not get in the way of fetching instructions, making them a bit more efficient than what you can achieve in the von Neumann processor.
There are also modern reproductions of old 8 bit designs that run very high clocks. Zilog made z80 derivatives as high as 140mhz for example. This custom CPU is not going to be the fastest 8 bit cpu in terms of raw performance, but is probably among the highest I have ever seen for IPC.. Its only bottleneck is its discrete logic. Very very impressive design I must say.
Ahh, those great, simple and straightforward early logic functions in Assembly Language! Great way to get a basic understanding of this stuff. Write a series of functions that enables those 8-bit micros to execute 16-bit mathematics!
Outstanding project. I originally learned to program on an Apple II so I appreciate just how incredible the results you've attained are here. If you have hardware support for two stacks and implement a forth for it you'd have an extremely productive computer in terms of time from concept to effective and efficient implementation.
Thanks! I'm not changing the hardware of this cpu now but I do have plans for a future build. In 64k higher level languages tend to be quite restricted by memory. On this cpu though, you could use one of the pointer registers in a similar way to another stack pointer, but pointer + offset addressing is a but more complex to do in code.
@@weirdboyjim that's what's amazing about Forth. Once you hit above 8k your Forth apps are likely to be lower in memory usage than hand written assembly. It's ideal for resource restricted environments. I definitely look forward to seeing your future efforts. If there was a good simulator of your current one I bet it would be quite quick to get an eforth port done to it. Will you eventually pack this thing up into a plexiglass case and hang it up operationally on your wall? It's got a beautiful esthetic! I'd buy one!
Thanks. The biggest limiting factor on mine is the rom chips, they have a 140ns access time so cap the speed at about 7mhz even if everything else was instant.
@@weirdboyjim In my case EEPROM AT28C256-15PU with access time as high as 150ns is perfectly readable at 10MHz, though I have to switch system clock to 7.3728MHz when I need to write to it in situ.
So even though there are faster 8 bit processors now, what's interesting about it is that this is a computer you could have designed and built in late 70s. Have you compared the gate or transistor count with chips like the 6502? It'd be interesting to know if this would have been manufacturable as an IC back then.
That's a tough one, you could add up all the gates on the chip I've used, but many of them are more general purpose with features I'm not using so you would end up with a far higher count than it would actually take.
Nice result, "didn't want to include 1 off boutique" systems? The X16 is vapourware lol, at least yours works and exists in the real world. Great work.
I think the X16 hardware does exist and is now working. Some devs have the hardware now and the reason it’s been delayed is to reduce the price. Certainly not “vapourware”.
If several people have real X16 hardware, it can hardly be "vapourware". Whether it becomes a readily available consumer grade product is a different argument. Many early 8 bit computers were available only as kits for electronics hobbyists, and sold in tiny numbers. That's where both Sinclair and Acorn started their foray in to computers.
The X16 is kind of a special case, the hardware may not be 100% final but there is a released specification and an emulator. More importantly there is a whole bunch of people actively developing for it, but this cpu it's just me and few people on the discord.
@@another3997 yes I have been following it since the beginning including being a member of the FB group so I have been "in the loop" re the many design issues, unavailability of senior designers at core of the development etc. Hopefully it will one day turn into a product. At this stage the design has not been locked in due to ongoing issues which of course includes the global chip shortage. Any machines that are in the hands of devs are very much subject to change. Cheers.
@@Stabby666 the delays , as per David's own updates are varied and many ranging from feature creep, ongoing design changes, troubleshooting, "retirement" of key designers and the global parts shortage. Price is one of many ongoing project issues. Cheers.
There are some people on the discord channel who are already doing that. It's not part of my plan for this design but is very much planned for it's successor.
Join us to discuss this and the other videos on discord: discord.gg/jmf6M3z7XS
Support the channel on Patreon: www.patreon.com/JamesSharman
try to build in a case
Thanks for the shout-out, James! I hope to start looking at your system soon.
Well thanks for your series and making the code open source! In part due to your comments I've started work on a simulator so I'll have the means to distribute a functioning build sooner or later (Sooner = less polished interface).
@@weirdboyjim If I could get a verilog implementation, that would be perfect!
@@slithymatt I just a pc executable. Some people on my discord are trying to put together an fpga version but it's not something I'm working on.
Seeing such a striking difference between machines that need multiple cycles per instruction and one which can (occasionally) reach the limits of scalar thruput is quite incredible
Thanks! Glad you found it interesting! Being excited about that difference is really why I started this project in the first place.
Nice work! Getting 3MIPS out of a 4MHz clock is certainly not bad. Not bad at all! A hundred videos in and I am still intrigued!
Excellent! Glad to hear you are finding it interesting. 3MIPS was certainly more than I dared hope for when I started this.
WoW! This reminded me of my BS graduation project in 1998 when I designed a RISC pipelined processor and wrote an assembler for it along with an emulator. The tool was used as an educational aid for freshman students in computer engineering department.
Sounds like a cool project!
Fantastic result, James ...and to do it with discrete logic, incredible! Happy 100th. I wonder how many hours that is?
Thanks Troy! But stop asking awkward questions about how many hours went into it, I don't want to know ;-)
@@weirdboyjim I'm wondering how many hours I've spent watching. 😂
I have a piece of the original cray 1. Dicreet components can do enough to need a new term of supercomputer.
@@thej3799 Nice! Any idea what that bit does?
@@weirdboyjim its from one of the logic boards that surround the inner column. It's not a complete piece, but I'm mostly certain it's part of what ever goes for the cpu part. Whatever it was is hard to tell, cray 1 was very modular. Don't know if element of that, or a part that was prone to more heat and failure. Why else design it so it could be easily swapped in or replaced.
Curious to find out how fast you can clock this. Lovely processor, I feel blessed I was able to watch you bring it to life.
Bringing this over to VHDL could immortalize your design. OpenCores comes to mind.
Some people are already working on an FPGA version. For the clock rate I'm very interested in understanding any architectural limitations with regard to this. The ultimate limit will be the memory chips though, they tend to be slower than other things.
@@weirdboyjim Isn't that something that you could just try by using i.e. a function generator instead of a crystal as your clock source and step up until a test fails?
@@maeanderdev temperature is also an important variable. I’m no expert but these things are usually best done as a paper exercise vs a practical one where subtle differences in particular parts which, by luck and not design, deviate from their specification.
@@weirdboyjim Then you are going to start working on a memory caching mechanism ;)
Congratulations, those are really impressive results!
You should indeed be proud.
I'm still surprised that, after so many videos, the subscribers and views on this channel aren't at least an order of magnitude larger.
Thanks for all the great content!
Thanks Crul, I appreciate the kind words. To be honest, I'm happy that people watch and find it interesting. I suspect I lack the personality type and presentation skills to make it really big.
@@weirdboyjim From what I've seen, I'd say the ways of RUclips's mighty algorithm are unfathomable. You can, and should, be proud of the content, in quality and quantity.
Regarding the numbers, good luck! It's mostly out of human control :)
@@weirdboyjim don't sell yourself short here. It is great to have a channel that doesn't give a sensory overload, that focuses on the actual topic and from which one can learn something new. I don't think there's any issue with the presentation or your personality. It can be just almost randomness with the algorithm, or maybe it is a bit niche topic (where the communities tend to be smaller but also tighter) or anything like that.
Most channels also have a small call for action in each video to remind people to subscribe, hit the notification bell and leave a comment (afaik that helps a lot with the algorithm), and if I remember correctly, you don't have that (writing on a phone so can't check easily right now). Maybe also adding a little teaser about what's coming up next (though I think you've already done this usually).
Or just ignore the stats and focus on producing more of the great content.
@@weirdboyjim definitely don’t sell yourself short. Be confident in your work and presentation and the viewers will come naturally.
@@fintux So adding Like and Subscribe has an effect on the RUclips algorithm? Explains why everyone has it, despite you only having to be on RUclips for 10 seconds to workout the purpose of Liking and Subscribing!
That's amazing. It was really fun to see the step through of the pipeline!
Glad you liked. Sometimes I let bits of code I'm working on run in trace mode for a while just to get a visual feel for how well I'm using different parts of the cpu.
Thanks for your hard work! I really wanna see where the project goes (and future projects)! I know this won't go too far with the costs, but I'm sure you'll put it to good use!
Aww man that's too much! I have always appreciated all the nice comments and feedback from you!
@@weirdboyjim I appreciate the videos! Please, use the money to buy more ICs, solder paste, connectors, and PCBs, or, packs of pens for the next design! 😂
Congrats on the 100th video! Loving the series. :)
Thanks Mr Glitch!
I love watching the LED's and how it shows what's going on. Really awesome setup. I kind of want one on my wall just blinking away.
Thanks! Mounting it on my wall is actually the plan once it's done!
Wow, what a great result - well done mate! Time to start work on your 16bit CPU !!!!
Thanks Seon! There will be other builds in the future, but not a 16bit one. ;-)
Congrats on the 100, and congrats for the inofficial crown in performance. Reminds me of the crazy headaches we had in the 80s to create some nice pixel graphics ...
Thanks Peter! Pixel graphics was a real artform back in the day!
My dad won a contest with him early EGA so 16 colors, The software was called Dr Halo I loved playing with it but he created this graphic practically pixel by Pixel and it was amazing ended up winning some kind of contest and we got like free meals at expensive restaurants and all kinds of other stuff for the family it was pretty cool and when I think back using the tools we have today it makes it all that much more incredible because it didn't feel like 16 colors.
The machine was an IBM clone 286 that had the math co processor. It was 12 megahertz but it had an absolutely astounding 2 megabytes of RAM and eternally pissed me off because Wolfenstein would not run on EGA but I know it could run on the 286 with VGA.
If I understand this well, (similar to) this could have been built back when the selected CPUs were the stars and this compares really favourously.
Huge work in outperforming the 70s chips with discrete logic - likely an achievment for life! Keep on good work!
Yeah, most of the logic chips were there. Memory chips were more of a problem, we are spoiled now. Each of my chips would have been several with a demultiplexor to select them.
This is an astonishing achievement - well done! Really brings home why the pipeline is so useful.
Thanks Roaming Adhocrat, glad you are still enjoying the series!
What an amazing project! When I was young, I thought I wanted to be a microprocessor designer, but this stuff is way over my head.
I think I know just enough know to vaguely see the vast complexity that must be hidden in modern cpu's.
Very interesting, the artificial NOP and instruction fetch stalling very well demonstrates why an instruction cache is needed, especially for a superscalar CPU.
That's exactly what I wanted to demonstrait!
@@weirdboyjim any plans on perhaps integrating an instruction cache register into your current CPU design? Very interesting performance nonetheless 👍🏼
Happy 100th! 🥳🥳
Thanks Jayne!
This is a fantastic labour of love, James. I've been binge-watching the whole series including the VGA implementation over the last 2 weeks and finally gotten to the end.
I've really enjoyed your journey with logic, layout, soldering, video editing and presentation. All done with a good dose of British self-deprecation! Your presentation skills are excellent in my opinion. Certainly they are superior to many university lecturers I had on the same topic back in the mid 90's! :)
Your coding skills are head and shoulders (and then some!) Above my own but I share your curiosity for just how far ideas can be taken using the hardware of the day and newer ideas. I wrote down a list of about 10 ideas (for improved signal integrity, latency reduction, stability) and another 10 architectural ideas that were used in the 8-bit days (almost! ;) ) that could give your project another huge performance boost. Probably way too much text to drop into a comments section so perhaps let me know if you're interested.
Thanks Stewart! That's some high praise! I'm a curious about your ideas, but I have a huge pile of ideas myself which I have to hold back on in order to keep going with this one. My current plan is to get this build finished roughly with the current plan and then embark on a new project. Needless to say more ram, less memory contention, more gpr's and better addressing modes are high on the list.
A very impressive result and a great 100th video. Shows how pipelining is far more efficient at running code than micro-coded CPUs.
I watched the 8-bit Battle Royale when it first came out and wrote a Mandelbrot for the CSCvon8 and got it to do 32x22 with max 16 iterations in about 2 seconds running at 6.3Mhz. Took me quite a while to get the 16x16 bit multiply to work but when I got it right it was magical to see the Mandelbrot set draw on the screen the first time.
Thanks David and nice work! That actually sounds very fast for that architecture. Maybe I should get you to optimize my code ;-)
@@weirdboyjimThe code isn't very optimised but the CSCvon8 'cheats' as it has a big ALU ROM with 8x8 bit multiply instructions, which helps a lot in this case. I've also got 160x120 with 64 iterations to finish in about 2 mins.
Good to see you back, and of course congrats on the 3 mips :)
Thanks Pete!
The pride you exhibit regarding this computer is VERY justified! Your work will not only help many people in the future understand the low level details of how computer systems function, but will also show the magic of following a dream and making it reality. If I had enough thumbs you would get a ten thumbs up from me for this series. (I think it is probably the best digital design series out there.)
I'm personally not surprised at your results on the Mandelbrot set. The old 8-bit CPU's were designed either to fit what technology of the day could cram into a single chip, or were designed to a price point. It would be interesting to see how your processor stacks up to even some 32-bit processors of the day, like the Motorola 68000 or even the first ARM processor. I think you might beat the 68000, and come in for a close second to the ARM chip.
High praise there Dave. Yeah, comparisons are difficult. The microprocessors we are comparing to here were revolutionary not for performance but for being a big part of bringing the entry point right down.
It's got to be the fastest 74 logic 8 bit surely ?.
And to say it has been designed, built and programmed together with VGA, sound, and UART, again all by 74 series logic by just one man is extremely incredible.
I would suggest naming it _"The Sharman 74"_ . The series has been brilliant from start to finish and I will watch them all again. Fantastic. 👏👏👏👏
Would be great if that's true, but I can see a few ways It could be made faster so I'm not fool enough to make any specific claims.
Congratulations, that's an amazing result. It does make me wonder what sort of speeds would be possible if the CPU could be fabbed on a comparable process.
Oh, and happy 100th video in the series.
Thanks Quxxy. Well we can predict the speed at a higher clock rate, but I'd more more inclined to refine the design further before chaining the format. Some of my choices are more suited to describe chips than a more compact implementation.
So the true race is IPC, not MIP. This is a pretty impressive result for a single pipeline single alu cpu, a more dynamic register file with an in-pipeline register renamer would boost it a bit, so would a dual headed ALU. I’m also starting to understand why so many CPUs did a multi bus design instead of a main bus.
It's all interrelated. Mips is IPC times clockrate. It's even more complicated when you think about the instruction themselves. In my cpu for example, if I want to set A to 0FF I could do either "mov a,0FF" or "xor a,a","dec a". Both will take 2 cycles and use 2 bytes of memory. The first one however is 1 instruction and the later 2, which is better? I could fudge the results a lot like this so in the end the only real test is to do something serious and see how long it takes. Hopefully the results here speak for themselves.
@@weirdboyjim the only real way to measure instruction effectiveness is with real world examples, which is why I’d only trust a branched jump table implementation as a measure, because it’s probably the most common bottlenecking pattern in software design.
Edit for clarification: a branched jump table that utilizes pointer arithmetic
Great to see the results here. I was a Z80 man myself in the 1980's, with the likes of TS1000 (AKA Z81) and Spectrum 48 within my repertoire of experience. I went straight to an IBM clone after that during my CS studies, but the Spectrum gave me lots of pleasure. One of my favourite games was Basil the Great Mouse Detective, chess, and a few others. Wrote my own 3-line editor. I tried making a full-screen editor, but it was painful watching the screen repainting after each keystroke. 3 lines were perfect. Boy what a trip down memory lane and I have you to thank for that James. Will you be re-inventing a sort of hard-drive for the computer? I would watch such a series. At this point I almost think you can build anything.
Ahh yes, you mean the ZX81, in hindsight it's incredible how little extra they managed beyond just the cpu to keep it cheap! I assume the editor was in basic? Really needed at least the screen update routines in assembler.
@@weirdboyjim Yes all of it was in Basic. One of the most useful feaures of the Spectrum basic was the fact that you could use a variable in place of a literal line number. This means that when you needed to branch to a sub at line 100 (say) to do screen update, you could at the top let screenUp = 100 and when you needed to call it use Gosub screenUpd. It may seem trivial, but it made the code easier to write and read. I still cannot today figure out how I learned to write code in a language without If then and else. There was no else in basic...??? Admittedly I only learned that construct later when I lerned Pascal as part of my CS course. It took a few days to write the editor and when I later refined it, I could save documents and read them using my editor, and print them out. 48K???
Excellent work! I'll admit that I didn't expect this big a margin.
Thanks Frank! I was hoping to would put on a good showing but I certainly wasn't counting my chickens against the X16 and it's higher clock rate.
100 episodes! Ace! You went from something to watch when I was bored in hospital to one of my favourite RUclips channels in about 3 episodes. Keep up The Great Work! :)
In "the great debate" at college, we always said the BBC beats the spectrum and the 64!
When they break down into CPU type, it makes sense.... Lots of pipelining wins, and smidge of pipelining comes second, no pipelining loses. Shame, I was always quite a fan of the Z80 back in the olden days.
When I'm in 8-bit land, I'm doing assembler on AVR microcontrollers... it'd be very interesting to see where that would come in the leader-board.... need some way to get VGA out of it without eating every single one of it's clock-cycles though.
You can use the timer interrupt to generate horizontal sync, and by extension also the data out and vertical sync to get VGA output with AVR
Thanks Edge. I suspect you'll find my lead disappears with some of those modern microcontrollers, they have a far more modern design.
Thank you, I just found a channel to watch during my insomnia!
Hope it lives upto expectations. But be warned, you start thinking about this stuff and you'll be ordering TTL chips by the end of the month ;-)
@@weirdboyjim 🤣🤣😂 I have the sanity to limit that madness to occasionally making a 6502 from a kit. I am not by any means good, but I am slowing learning 6502 assembly from YT. i had a C64 and a NES growing up and they made me fond for the 6502. The Z80 is another great cpu though.
Added the word learning
I absolutely love what you've done and always look forward to new episodes. You have all the reason to be proud!
Thanks Wouter, I appreciate the support!
I am surprised I only seem to have discovered this channel today. Brilliant stuff. Looking forward to watching the preceding 99!
Welcome! Hope it lives up to expectations.
@@weirdboyjimJust watching your first counter build and it already is.
The 6502 is my favorite processor 😍 love what you got here!
Thanks Hicknopunk!
You're a joy to listen to, and this creation is a joy to behold. Cheers.
High Praise! Glad you liked it!
This is such a cool series. I've not gotten to watch everything yet, but working my way through it. I've managed to get a good handle on basic CPU design, but pipelining was always just out of my grasp. Thanks for showing us the work!
I'm pleased it was interesting!
A great video, and a great way to mark the 100th episode. Mandelbrot plots are always cool. It's fascinating how the incorporation of pipelining improves the IPC performance compared to machines without it. Of course, un-rolling loops and similar tweaks can also help further if the algorithm allows and one has the patience. ;)
Thanks! Elements of the design came from my own experience optimizing code and tweaking the instruction set to make things easier.
@@weirdboyjimKind of like ARM, where Sophie both programmed BBC basic, and also the instruction set for ARM, without anything too unnecessary. I'm sure they also got input back from the implementation for what's easy or not.
If you ever get into another build, I'd love to see perhaps a standardized ISA like RISC-V or MIPS or some such, made into a homemade CPU. The instruction set and architecture are a lot more disconnected than you'd really think, when you get more advanced.
What a fantastic project and an awesome achievement. It's hard to believe that this was how early processors were designed and tested, with lots discrete chips on boards, all spread on a desk. It's even more amazing that today, all of that can be fitted in to a tiny little package smaller than a fingernail and can be purchased for pennies. My first computer was a Sinclair ZX81, which I thought was a miracle of miniaturisation. 😁
The ZX81 was one of the first computers I had regular access to, horrible little thing in hindsight but felt like magic at the time.
Excellent result! Some of my first computing was on a CDC6600 which had pipelining and some asynchronous operations - did 3 MIPS but with 60 bit words and core memory. One of the most important architecture inventions in the 1960s was of memory cacheing - why not give that a try? If your code is doing a lot of localised fetch/store ops it can help a lot to resolve the cpu/memory speed mismatch.
This CPU is reaching the boundary of it's designed parameters. I plan on future builds that will experiment with more advanced concepts but I don't want to keep iteratively redesigning this one, that's no way to make a nice clear architecture. A cache for example needs logic that can handle a cache miss everywhere you are accessing memory, as a retrofit that is tough.
@@weirdboyjim Yup, understand that. Also it depends on the memory interface and how it’s architected - if it’s synchronous and just waiting for the data to show up or getting on with other stuff meantime.
I was wondering what you'd do for the 100th "episode". Benchmark is a great idea!
Thanks! Glad you liked it.
Awesome results. Congratulations on both the speed of your CPU and reaching 100 amazing episodes for it. Thanks James, take care.
Thanks Jerril! Thanks for all your support through the series!
Oh yeah, that's awesome!
I knew this thing was a beast, and seeing it absolutely smoke the competition brought a massive smile to my face!
Thanks! And you are big league enough now that studio gave me a 2nd notification!
Amazing work. I have really enjoyed watching your videos.
Thanks! Glad you are enjoying!
Not sure how I've missed this project but it's fantastic that you can get the performance and display with 8 bits on discrete logic.
Thanks! Well I'm glad you found it now!
It's amazing that you can out perform a CPU chip with all the transistors packed together with your CPU with the components spread out over 10s of cm. Fantastic project. And your presentation skills a perfect for a project like this.
Thanks Alex! I'm glad you are enjoying!
wow, it looks gorgeous. It is so well layed out. I know exactly how it would look had I made something similiar
Yes! It roughly matches my sketch before I started.
Yeah, I'm just wildly impressed. I was also glad to see that the 6502 , as I always expected, turned out to be the boss of the home micros :-).
Glad you enjoyed it! 6502 was a great processor, especially relative performance in terms of gate count and cost.
Great work James, I will be following your work for sure!!
Great to have you along Arto!
Wow, this is really impressive ! I really love your attention to detail when you explain things and I really love coming back for the know-how you share. I benched my own version of the X16, and it came in exactly as predicted, running at a simulation 4Mhz with no other real hardware than a 65C02 CPU. But your 1.3 is just so out of this world comparably.
Interesting Thanks Dirk, have you done much coding on the x16? Obviously that graphics fpga would have me beaten any day for pixel moving.
@@weirdboyjim I've done some experiments to find out more of how it's supposed to work - since I don't have a real vera, I need to go by the emulation code that is freely available. I'm currently spending way much time getting the simulation to work like hardware, and getting the hardware to not notice the simulated bits.
Wow! thats so cool 😎 james.. I have always had day dreams wondering how far 8 bit could be have been pushed without 80s budget constraints so anything like this I find fascinating.
Yeah, many of these chips were around (or equivalents) in the 70's but some were extremely expensive.
If you want an indication, look at the history of the ARM processor. Okay, it is 32-bit, but then if you are chasing performance, you don't stay with 8 bits. 25,000 transistors, virtually no budget, very few resources, but 2 really smart people.
Congrats on the 100th, love your work.There is a modern Z80 called the eZ80. It can run at 50Mhz and has a 3 stage pipeline. I wonder how it would do running the Z80 version of the benchmark. One day I will have to give it a try,
I'd be interested to here. I imagine it will trash me, especially at that clock rate. That was kind of the point I was making, I compare well against the decades old devices of my youth but I have no illusions against anything designed more recently by an expert.
Love the design, and the results! Congrats on building this very cool system. Subscribed and off to check out your other videos!
Thank you very much! Hope the others live up to expectations!
@@weirdboyjim They absolutely do! I had been considering working up to the same sort of project myself after watching Ben Eater's videos. I'm sure I'm going to learn a lot from your experience. Thank you so much for sharing!
Congratulations! It's a huge milestone.
Thank you Philip!
Congrats on the 100th video mate!
Thanks Paul!
Awesome job and fantastic series. I am especially amazed at the way you approach things and how you managed to bring you original design to reality. Like I heard someday in a movie which name I cannot even remember : „I like how your brain work“ ;) very inspirational! Thanks a lot for sharing it all. And please go on !!
Thanks Nicolas, glad you are finding the series interesting.
This is amazing! Cool project!! 👏👏👏
Glad you like it!
That's ... fascinating and awesome.
Congratulations.
Thank you very much!
You've put an amazing amount of work into this! Really impressive.
Thanks, Glad you have found it interesting!
I wonder, how would your computer compare to a commercial discrete logic computer like the PDP-11? Or even a modern AVR or PIC...
I suspect those modern AVR's and some of the PIC's maybe faster, especially at higher clock rates. The PDP-11's were 16bit devices but I don't know a great deal about their performance characteristics.
Had to watch again. And I know I will watch it again.
Fantastic work, James! Love it! Keen to see it progress!
Thanks George! Hope the new data I sent helps with your experiments.
@@weirdboyjim it definitely will! I'm still strapped for time this week, but I'll be back on it in the next few days! As soon as I have something worth sharing, I'll be in touch!
I have really been loving this series.
Glad you like it!
Fantastic results - genuinely impressive work, and a great project.
Thank you very much Andy!
Just found this channel, and I've been binge watching the series. It's amazing. I hope when it's completely finished, this computer is offered as a kit as an education resource, the same way the Cerberus 2080 is. It could be an amazing resource. I'd love to assemble one and learn from it. I would also love to know if this design can be implemented using CPLDs or an FPGA. Cheers!
Certainly you could do most, if not all of this on an FPGA, though a single CPLD would probably be far too small. There's a few folks on the Discord that have written PC emulators for it as well.
@@awesomecronk7183 Thanks for the info. Yes, I was not implying just one CPLD, but several, each with a role. I’ll join the Discord, but I despise the platform, since it’s closed, and the info not publicly available the way forums are. A lot of valuable information is being put there, and you can’t find that using a search engine. Pity it’s replacing the more useful forums…
Getting copies of this hardware out to people might be difficult, but I have started work on a simulator that serve one day.
@@damianvila I agree about that, but Discord does have it's uses. For one, it's far faster-paced than forums are, since chatting is real-time. That said, it's like having a conversation at my house, vs writing down our messages and posting them at the library. Yeah, it's harder to share that conversation with the world, but you can communicate in real time, so a lot more gets done. Fortunately, I don't think it will ever fully replace forums.
Incredible. Awesome work.
Thanks!
Excellent work! Amazing up to 100! Really appreciate the deep dive into the bench-marking. Thanks.
I'm pleased you found it interesting!
Awesome! Congratulations!
Thank you so much 😀
Is it geekish to say that this is really cool stuff? 😉
Greetings from germany,
Marcus
Yes, Yes, it is! Welcome ;-)
Such a cool achievement. Well done and thanks for those fantastic videos
Thanks! It's great that people are enjoying it!
I've been following this project for some time now (not from the first, but close enough). I know you've tightly focused on your original objectives -- 8-bit, pipeline, SSI TTL-compatible chips for most everything in your CPU proper, but using LSI EEPROM and static RAM because life is too short to try memory solutions from TTL's heyday. That said, you have augmented your design with very useful hardware I/O. Have you considered adding a simple EEPROM (or, better yet, shadowed ROM in RAM as you do for your too-slow EEPROM) precomputed lookup tables for 8x8 multiply and maybe scaled fixed-point reciprocals, square roots, trig functions, etc? Allocating some registers in I/O space (or memory-mapped I/O) for a sort of table lookup maths coprocessor could be very interesting for increasing performance without adding complexity to the CPU. You are already using various sorts of LSI ROM & RAM techniques, so this would still be in the original spirit of your objectives. You needn't add more than one such lookup table at a time, as long as you have some unassigned I/O ports left. Multiply would surely be worth it, and reciprocal lookup does away with much of the heartburn and many, many cycles of long division. Most division problems in your use case would be reduced to finding the reciprocal of the divisor, multiplying that by the dividend instead of doing regular division, with either pre- and/or post-scaling to get the significant digits you require.
When I finalize the build I may show how we can reorganize the instruction set to make simplifying the pipelines possible. I could indeed add the kind of hardware you suggest, might be an interesting side project but I was aiming for a good general purpose throughput, It's possible to speed up just about anything with a lookup. Multiply is much easier to get right than a divide though.
Impressive work, well done!
Thanks for the visit
Congratulations, you have earned your success ;-)
Thank you so much 😀
solid mate. And no bullshit. Extra marks.
Thanks Twobob Club, appreciate it!
Excellent video! Subbed.
Thanks, hope it lives up to expectations!
Dude, this machine is incredible! And at 100 parts no less?! How did I miss this???
Regardless, I hope you keep up with making this the One Computer To Rule Them All!
...my question is: what will this incredible miracle be named once it is all completed?
Thanks Gecko! Ahh, it really does need a name but I've not come up with anything that sits well with me. Happy to take suggestions.
I discovered your channel lately but i have to watch the full series
Hope it lives upto expectations!
Fascinating work. I'm surprised your processor - spread across your desktop - is faster than the classic 8-bit. I also appreciate the 'normalized' performances. I was surprised the Z-80 performed so poorly. Congrats on a great result. I'm subscribed - continued success!
Glad you found it interesting Gregory!
The Z80's ALU is only 4 bits wide and it takes a lot of clock cycles to do almost anything.
@@johnm2012 😯
@@devcybiko RUclips won't let me post a link but you can search for "Z80 ALU" and look for Ken Shirriff's blog. The Z80 Wikipedia article should mention it too, if it's worth it's salt. Obviously, all designs are compromises, but this seems like an odd trade-off to me.
WOAH!!?! Brings me back to my Intel 8051 microcontroller frustrations! The Assembler / development environment / ‘emulator’ ran on a DOS terminal. And so it was always a riddle to me, whether the ASM program was really yielding clock cycles and values that were true to not just it’s own software programming, but if whether that software was seriously delegating every 8051 resource appropriately, in the same order, initializing it’s registers, clearing its carry(s), setting up for parity, etc etc. And doing this initialization process just as some specific microcontroller’s data sheets had described. I find it rather amusing, the remaining two camps still to this day, who either prefer the clock’s ticks to be left up to X-tal wiggles, or by way of the RTC, driving those cycles over Transistor-Transistor-Logic. It seems to me
That the TTL solutions are better geared for say a clock radio or a microwave oven, and the crystals are something that I would have to hand and so I’d grab it. THANKS A BUNCH FOR SHARING THIS, VERY GREAT LECTURE!!
Thanks Jimmy, glad you've been finding it interesting.
That's not just a piece of engineering, it's a work of art too!
Very kind words!
@@weirdboyjim Well that's just the thing, look at the complexity of what we consider a simple system or simple architecture today. Yet this younger generation they were practically born with a super computer in their hands that we can put in our pockets. It amazes me the things we end up taking for granted. And many people does not care how it works only that it does and a lot of them have no appreciation for the engineering, time, and hard work that many had invested over the years to build such things.
Hi james. Amazing 100th. Have you looked back at your first videos ? It's amazing what you have achieved. Both in terms or CPU and in terms of video quality and editing. Looking foward to the 1000th 😉
Thanks Ced! Oh man, some of my early videos make me cringe! I may not be great at presenting but at least I'm better than that old James! :-D
fantastic, congratulations !
Glad you like it Amaury!
What a fantastic job! Thanks for sharing.
Thanks Antonio!
Matt should have add your benchmark score. Don't get me wrong i love his channel too. But did he give a reason why? Don't understand he does have the X16 in his benchmark that even use an FPGA.
I love it that your cpu/homecomputer is build out all on discrete IC's.
If your project is finished i will probably order the kit.
Nice job James.
I respect his decision on this, it's his series after all. The benchmark gave me a nice way to compare my cpu against other systems without a massive amount of effort.
Have you considered adding instruction reordering capabilities to your assembler to minimize the number of NOPs?
That would be great to have but it's an order of magnitude more complex as your assembler needs to be given a far deeper understanding of the processor workings. It would be many times more effort than for me to just hand tune the critical code.
I'm thinking that if you wrote a CPU book it might be a fulfilling next direction for your project, and many people might be interested. It could be written in parts and published on Amazon KDP , with each subsequent edition adding more content to previous editions - this way the first edition might be 200 pp or even less, and expanded to a longer book overtime. I'm mentioning this in case writing a book might be a fulfilling path for you on which to continue the CPU project. I wrote a book on Analog electronics in the same way, now it's on the 3rd edition, and hopefully the 4th is not too far off. I've had about 300 books sold in a year, but in your case, I think it'd be quite more popular (as for one thing more people are interested in CPUs than in Analog).
Wow, I can see that being a bit of a big time commitment. To be honest I'm not sure I would be very good at it, I'm Dyslexic which normally goes unnoticed but it might take me a long time to get thoughts down in that format.
@@weirdboyjim in light of that your achievements are more impressive still. You know, I mentioned the book just on the chance that's something that you might find inspiring & fulfilling if the possibility was suggested to you. If you feel that's not your thing, then of course, especially when considering the time investment that would be required, it's probably best not to veer into it from the present format, which anyhow conveys to the audience a lot of what a book would have conveyed. For me personally, the idea of a book was more exciting so I pursued it, but then again I wouldn't have had the talent to make interesting RUclips videos..
This is stupendously good! Blows the hat right off the Commander, and running at 4MHz no less... Now I really want to go back and watch how the pipelines work.
Also I do wonder how much FPGA space an optimized version of your architecture would require. And I kind of want to try writing code for it!
Thanks! I've started work on a simulator so that maybe something I can share at some point.
That's really fantastic. It may be an faq but since you have most of the logic transferred from breadboard to pc's, do the Gerber/Eagle/kicad files exist somewhere? Or even the schematics?
It's on the channel description page. I do my design work on easyeda so my profile there (or on oshwlab) has everything I've made public. I tend to release stuff after I've tested it working. Poke me on discord if I haven't released something you want to take a look at. oshwlab.com/weirdboyjim
The 6502 clock speed is a bit misleading - it uses a 2-phase clock, effectively doubling its internal cycle rate in some cases. Conversely, the Z80 (and others) effectively generated a multi-phase clock from a single oscillator. Taking that into account, you can see that they are pretty close to each other. Both are blown away by the pipelined cpu - I didn't appreciate just how much of a throughput boost pipelining gives. If you had more RAM bandwidth you could get a fair bit more throughput in some conditions, with a single stage look-ahead buffer. But at that point it starts to get really complex (as if it isn't already).
Yeah, performance is a very difficult discussion point. This was a pretty short video where I didn't want to go too deep so the point I wanted to get across was really "it's more than just MHz". Truth is the most important performance metric is how fast can it do [thing I need to do].
Fuck me side ways, your CPU might not be compact, but it's shit hot on performance! Some amazing work over the years paying off!
Thanks Rae! You kiss your partner with that mouth? ;-)
Most Arduinos are 8bit and run at 16 Mhz, but there are many registers (about 30) and extended instruction for 16bit math (like adc and ror (rotate with carray)), there is also the stm8 series which runs up to 24 Mhz.
Yeah, those are the kind of devices I was referring to when I said there are more modern 8-bit designs.
And the AVR8, like the original PICs and clones, are Harvard architecture processors. So accessing data memory does not get in the way of fetching instructions, making them a bit more efficient than what you can achieve in the von Neumann processor.
There are also modern reproductions of old 8 bit designs that run very high clocks. Zilog made z80 derivatives as high as 140mhz for example. This custom CPU is not going to be the fastest 8 bit cpu in terms of raw performance, but is probably among the highest I have ever seen for IPC.. Its only bottleneck is its discrete logic. Very very impressive design I must say.
Ahh, those great, simple and straightforward early logic functions in Assembly Language! Great way to get a basic understanding of this stuff. Write a series of functions that enables those 8-bit micros to execute 16-bit mathematics!
Afaik there are Hitachi enhanced 8051's that go over 100MHz.
That thing is amazing. I am amazed.
Glad you like it!
Outstanding project. I originally learned to program on an Apple II so I appreciate just how incredible the results you've attained are here. If you have hardware support for two stacks and implement a forth for it you'd have an extremely productive computer in terms of time from concept to effective and efficient implementation.
Thanks! I'm not changing the hardware of this cpu now but I do have plans for a future build. In 64k higher level languages tend to be quite restricted by memory. On this cpu though, you could use one of the pointer registers in a similar way to another stack pointer, but pointer + offset addressing is a but more complex to do in code.
@@weirdboyjim that's what's amazing about Forth. Once you hit above 8k your Forth apps are likely to be lower in memory usage than hand written assembly. It's ideal for resource restricted environments. I definitely look forward to seeing your future efforts. If there was a good simulator of your current one I bet it would be quite quick to get an eforth port done to it.
Will you eventually pack this thing up into a plexiglass case and hang it up operationally on your wall? It's got a beautiful esthetic! I'd buy one!
Congratulations!
Thank you!
Amazing work! My 3x breadboard Z80 based hobby computer was stable at 10MHz though.
Thanks. The biggest limiting factor on mine is the rom chips, they have a 140ns access time so cap the speed at about 7mhz even if everything else was instant.
@@weirdboyjim In my case EEPROM AT28C256-15PU with access time as high as 150ns is perfectly readable at 10MHz, though I have to switch system clock to 7.3728MHz when I need to write to it in situ.
So even though there are faster 8 bit processors now, what's interesting about it is that this is a computer you could have designed and built in late 70s. Have you compared the gate or transistor count with chips like the 6502? It'd be interesting to know if this would have been manufacturable as an IC back then.
That's a tough one, you could add up all the gates on the chip I've used, but many of them are more general purpose with features I'm not using so you would end up with a far higher count than it would actually take.
That’s a pretty advanced 8-bit; embedded audio and video? Things to be wished for back in the day…
Thanks Mark, glad you liked it.
Great work!
Thanks Marlon!
.7 instructions per clock for average code is extremely impressive!
Thanks Eric, I was pleased with it!
Nice result, "didn't want to include 1 off boutique" systems? The X16 is vapourware lol, at least yours works and exists in the real world. Great work.
I think the X16 hardware does exist and is now working. Some devs have the hardware now and the reason it’s been delayed is to reduce the price. Certainly not “vapourware”.
If several people have real X16 hardware, it can hardly be "vapourware". Whether it becomes a readily available consumer grade product is a different argument. Many early 8 bit computers were available only as kits for electronics hobbyists, and sold in tiny numbers. That's where both Sinclair and Acorn started their foray in to computers.
The X16 is kind of a special case, the hardware may not be 100% final but there is a released specification and an emulator. More importantly there is a whole bunch of people actively developing for it, but this cpu it's just me and few people on the discord.
@@another3997 yes I have been following it since the beginning including being a member of the FB group so I have been "in the loop" re the many design issues, unavailability of senior designers at core of the development etc. Hopefully it will one day turn into a product. At this stage the design has not been locked in due to ongoing issues which of course includes the global chip shortage. Any machines that are in the hands of devs are very much subject to change. Cheers.
@@Stabby666 the delays , as per David's own updates are varied and many ranging from feature creep, ongoing design changes, troubleshooting, "retirement" of key designers and the global parts shortage. Price is one of many ongoing project issues. Cheers.
Awesome :) Would be great if the next step would be to create the cpu inside a chip ;) fpga, maybe ?
There are some people on the discord channel who are already doing that. It's not part of my plan for this design but is very much planned for it's successor.
That's an awesome result 😊👍
Thanks Claire! Hope you have a good time next weekend! Poor timing that I'll be away when you visit my city!