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The related files can be downloaded at kr.mathworks.com/matlabcentral/fileexchange/175778-dc-analysis-of-2-bjt-circuit-and-an-nmos-circuit-using-matla.%nm04p11.mclearbetaF=100; betaR=1; alphaR=betaR/(betaR+1);Is=1e-15; Isc=Is/alphaR; % BJT parametersVT=(273+27)/11605; % Thermal voltage: VT=(273+T)/11605VCC=15; VBB1=5; RB1=33.3e3; RC1=5e3; RE1=3e3; RE2=2e3; RC2=2.7e3;% To find the equivalent of the voltage divider biasing circuit%VBB1=VCC*R2/(R1+R2); RB1=parallel_comb([R1 R2]); % Exponential model based approach iC=@(v)Is*exp(v(1)/VT)-Isc*exp(v(2)/VT); % Eq.(E4.4.4a)iB=@(v)Is/betaF*exp(v(1)/VT)+Isc/(betaR+1)*exp(v(2)/VT); % Eq.(E4.4.4b)% Eq.(P4.10.1) with v=[vBE1 vBC1 vEB2 vCB2]eq=@(v)[VCC-VBB1+v(2)-RC1*(iC(v(1:2))-iB(v(3:4)))+RB1*iB(v(1:2)); VBB1-RB1*iB(v(1:2))-v(1)-RE1*(iC(v(1:2))+iB(v(1:2))); VCC+v(4)-RC1*(iC(v(1:2))-iB(v(3:4)))-RC2*iC(v(3:4)); VCC-v(3)+v(4)-RE2*(iC(v(3:4))+iB(v(3:4)))-RC2*iC(v(3:4))];options=optimoptions('fsolve','Display','off'); %,'TolX',1e-10,'TolFun',1e-10); %,'Diagnostics','off'); v0 = [0.7; 0.4; 0.7; 0.4]; % Initial guess for v=[vBE1 vBC1 vEB2 vCB2]v = fsolve(eq,v0,options); % v = Newtons(eq,v0); % Alternatively,VBE1=v(1); VBC1=v(2); VEB2=v(3); VCB2=v(4);format short eIB1=iB(v(1:2)), IC1=iC(v(1:2))IB2=iB(v(3:4)), IC2=iC(v(3:4))VC1=VCC-RC1*(IC1-IB2), VB1=VC1+VBC1, VE1=VB1-VBE1VE2=VCC-RE2*(IC2+IB2), VB2=VE2-VEB2, VC2=VB2+VCB2format short%nm04p12a.mVDD=10; R1=10e6; R2=10e6; RD=6e3; RS=6e3; Kp=1e-3; Vt=1;VG=R2/(R1+R2)*VDD; % Eq.(P4.12.2)eq=@(v)[VG-v(2)-RS*iD_NMOS_at_vDS_vGS(v(1),v(2),Kp,Vt); %Eq.(P4.12.10) VDD-v(1)-(RD+RS)*iD_NMOS_at_vDS_vGS(v(1),v(2),Kp,Vt)];v=fsolve(eq,[Vt Vt]);function [iD,mode]=iD_NMOS_at_vDS_vGS(vDS,vGS,Kp,Vt,lambda)if nargin
The related files can be downloaded at kr.mathworks.com/matlabcentral/fileexchange/175778-dc-analysis-of-2-bjt-circuit-and-an-nmos-circuit-using-matla.
%nm04p11.m
clear
betaF=100; betaR=1; alphaR=betaR/(betaR+1);
Is=1e-15; Isc=Is/alphaR; % BJT parameters
VT=(273+27)/11605; % Thermal voltage: VT=(273+T)/11605
VCC=15; VBB1=5; RB1=33.3e3; RC1=5e3; RE1=3e3; RE2=2e3; RC2=2.7e3;
% To find the equivalent of the voltage divider biasing circuit
%VBB1=VCC*R2/(R1+R2); RB1=parallel_comb([R1 R2]);
% Exponential model based approach
iC=@(v)Is*exp(v(1)/VT)-Isc*exp(v(2)/VT); % Eq.(E4.4.4a)
iB=@(v)Is/betaF*exp(v(1)/VT)+Isc/(betaR+1)*exp(v(2)/VT); % Eq.(E4.4.4b)
% Eq.(P4.10.1) with v=[vBE1 vBC1 vEB2 vCB2]
eq=@(v)[VCC-VBB1+v(2)-RC1*(iC(v(1:2))-iB(v(3:4)))+RB1*iB(v(1:2));
VBB1-RB1*iB(v(1:2))-v(1)-RE1*(iC(v(1:2))+iB(v(1:2)));
VCC+v(4)-RC1*(iC(v(1:2))-iB(v(3:4)))-RC2*iC(v(3:4));
VCC-v(3)+v(4)-RE2*(iC(v(3:4))+iB(v(3:4)))-RC2*iC(v(3:4))];
options=optimoptions('fsolve','Display','off'); %,'TolX',1e-10,'TolFun',1e-10); %,'Diagnostics','off');
v0 = [0.7; 0.4; 0.7; 0.4]; % Initial guess for v=[vBE1 vBC1 vEB2 vCB2]
v = fsolve(eq,v0,options); % v = Newtons(eq,v0); % Alternatively,
VBE1=v(1); VBC1=v(2); VEB2=v(3); VCB2=v(4);
format short e
IB1=iB(v(1:2)), IC1=iC(v(1:2))
IB2=iB(v(3:4)), IC2=iC(v(3:4))
VC1=VCC-RC1*(IC1-IB2), VB1=VC1+VBC1, VE1=VB1-VBE1
VE2=VCC-RE2*(IC2+IB2), VB2=VE2-VEB2, VC2=VB2+VCB2
format short
%nm04p12a.m
VDD=10; R1=10e6; R2=10e6; RD=6e3; RS=6e3; Kp=1e-3; Vt=1;
VG=R2/(R1+R2)*VDD; % Eq.(P4.12.2)
eq=@(v)[VG-v(2)-RS*iD_NMOS_at_vDS_vGS(v(1),v(2),Kp,Vt); %Eq.(P4.12.10)
VDD-v(1)-(RD+RS)*iD_NMOS_at_vDS_vGS(v(1),v(2),Kp,Vt)];
v=fsolve(eq,[Vt Vt]);
function [iD,mode]=iD_NMOS_at_vDS_vGS(vDS,vGS,Kp,Vt,lambda)
if nargin