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[COA 56] Incrementer (using Half Adder) and Decrementer circuit (using Full adder)
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- Опубликовано: 17 дек 2018
- Incrementer using half adder and Decrementer using full adder
Introduction: Computer Organization and Architecture: • [COA 1] Introduction: ...
Logic Gates: AND, OR, NOT, NAND, NOR, EXOR, EXNOR: • [COA 2] Logic Gates: A...
Boolean Algebra, Boolean function, Truth table, Logic diagram, Boolean expression: • [COA 3] Boolean Algebr...
Canonical form and standard form. Sum of minterms and product of maxterms: • [COA 4] Canonical form...
Map Method (P1): K-Map simplification: • [COA 5] Map Method (Pa...
Map Method (P2): Map simplification using don't care condition: • [COA 6] Map Method (Pa...
Map Method (P3): Product of sum using map: • [COA 7] Map Method (Pa...
Universal Gates (NAND and NOR Gates): • [COA 8] Universal Gate...
NAND and NOR Realization: • [COA 9] NAND and NOR R...
Number System: Decimal, Hexadecimal, Octal and Binary: • [COA 10] Number System...
Conversion I(Decimal to Binary & Binary to Decimal): • [COA 11] Conversion I ...
Conversion II(Decimal to hexadecimal & hexadecimal to decimal): • [COA 12] Conversion II...
Conversion III(Decimal to octal & Octal to decimal): • [COA 13] Conversion II...
ConversionsIV: Octal - Hexadecimal, Hexadecimal - Octal, Octal - Binary, Binary - Octal: • [COA 14] Conversions I...
Complements r's and (r-1)'s complements, 10's, 9's, 2's, 1's, 8's, 7's complements: • [COA 15] Complements r...
Binary Codes: BCD, 2 4 2 1 code, 8-4 -2 -1 code, Excess 3 code, Biquinary code, Grey code: • [COA 16] Binary Codes:...
Binary arithmetic: Binary addition, subtraction, multiplication, division: • [COA 17] Binary arithm...
Octal number arithmetic: Octal addition, Octal subtraction, Octal multiplication, Octal division: • [COA 18] Octal number ...
Fixed and Floating point representation, IEEE 754 standard: • [COA 19] Fixed and Flo...
Combinational circuit: Half adder, Full Adder, Half Subtractor,Full Subtractor: • [COA 20] Combinational...
Combinational circuit: BCD Adder: • [COA 21] Combinational...
Code conversion: BCD to Excess 3 code: • [COA 22] Code conversi...
Magnitude Comparator: • [COA 23] Magnitude Com...
Binary Serial and Parallel Adder: • [COA 24] Binary Serial...
Carry Lookahead Generator (Adder): • [COA 25] Carry Lookahe...
Parity bit generator & checker: • [COA 26] Parity bit ge...
Decoder Part I: Basic decoder operation, block diagram, circuit diagram: • [COA 27] Decoder Part ...
Full adder implementation using Decoder: • [COA 28] Full adder im...
Construct 4:16 decoder using two 3:8 decoders: • [COA 29] Construct 4:1...
Encoder: • [COA 30] Encoder
Multiplexer (PI) using simple explanation: • [COA 31] Multiplexer (...
De-Multiplexer using simple example: • [COA 32] De-Multiplexe...
Quadruple two line to one line multiplexer: • [COA 33] Quadruple two...
Implementation of Boolean function using multiplexer: • [COA 34] Implementatio...
ROM Design Basics: • [COA 35] ROM Design Ba...
PLA: Programmable logic array: • [COA 36] PLA : Program...
Sequential Circuit (P 1): Basics: • [COA 37] Sequential Ci...
Flip Flops(P1): • [COA 38] Flip Flops (P...
Flip Flops(P2): RS FF, D-FF, JK-FF, T-FF: • [COA 39] Flip Flop (Pa...
Sequential circuit design using JK Flip flops: • [COA 40] Sequential ci...
State reduction: Sequential circuit: • [COA 41] State reducti...
Design a counter using T Flip Flops: • [COA 42] Design a coun...
Ripple Counter (Binary and BCD), Synchronous Counter, Up Down Counter: • [COA 43] Ripple Counte...
Registers (Basics): Register with D FF, Register with RS FF, Register with reloading: • [COA 44] Registers (Ba...
Basic Shift Register and Bi-directional Shift Register with Parallel Load: • [COA 45] Basic Shift R...
Counter with parallel load: • [COA 46] Counter with ...
Ring Counter: • [COA 47] Ring Counter
Johnson Counter using simple example: • [COA 48] Johnson Count...
NAND Gate Decoder: • [COA 50] NAND Gate Dec...
Register and register transfer: • [COA 51] Register and ...
Common bus system using multiplexer: • [COA 52] Common bus sy...
Three state bus buffer: • [COA 53] Three state b...
4-Bit Binary Adder and Memory Transfer: • [COA 54] 4-Bit Binary ...
4 Bit-Adder Subtractor: • [COA 55] 4 Bit - Adder...
Incrementer (using Half Adder) & Decrementer circuit (using Full adder): • [COA 56] Incrementer (...
Complete Arithmetic Circuit using Full adder & Multiplexer: • [COA 57] Complete Arit...
Logic Micro operation: • [COA 58] Logic Micro o...
BIT Manipulation: Selective set, selective complement, selective clear, mask, insert, clear: • [COA 59] BIT Manipulat...
Shift Micro operation: Logical, circular, & arithmetic shift: • [COA 60] Shift Micro o...
CPU & General register organisation: • [COA 61] CPU Basics an...
Instruction format: • [COA 62] Instruction f...
Addressing Modes: Implied, Immediate, Register, Register indirect: • [COA 63] Addressing Mo...
Program Interrupt: External, Internal, Software: • [COA 64] Program Inter...
Program Status Register: • [COA 65] Program Statu...
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TQ SIR