Q. 4.6: A majority circuit is a combinational circuit whose output is equal to 1 if the input

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  • Опубликовано: 31 янв 2020
  • Q. 4.6: A majority circuit is a combinational circuit whose output is equal to 1 if the input variables have more 1’s than 0’s. The output is 0 otherwise.
    (a) Design a 3 input majority circuit by finding the circuit’s truth table, Boolean equation, and a logic diagram.
    (b) Write and verify a Verilog gate-level model of the circuit.
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    Dhiman Kakati
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Комментарии • 22

  • @hiimhira1767
    @hiimhira1767 4 года назад +1

    Awesome work, you're a real one

  • @sahasona9718
    @sahasona9718 3 года назад

    Derive the Logic Function and design the Logic Circuit for implementation of 3 - Input
    Minority Gate.
    How solve this problem

  • @melvinbesilla7406
    @melvinbesilla7406 3 года назад +2

    awesome ..what about 5 inputs?

  • @sanattaori8519
    @sanattaori8519 3 года назад +1

    Good explanation

  • @Hikkbcfhn
    @Hikkbcfhn 3 года назад

    thank you you made it very easy and straightforward

  • @Hamza.shoukat
    @Hamza.shoukat 2 года назад

    Love you hogya sir very interesting

  • @shriganeshayenamah3422
    @shriganeshayenamah3422 Год назад +1

    Thank u sir

  • @mdkawsar718
    @mdkawsar718 2 года назад

    thank you

  • @nayankarmakarofficial6294
    @nayankarmakarofficial6294 2 года назад

    Thnq so much

  • @bhargavkillada9111
    @bhargavkillada9111 2 года назад

    Where we will use this circuit

  • @Emir_Kashiwazaki
    @Emir_Kashiwazaki Год назад

    YOU ARE GOAT MAN

  • @pragatitalekar8684
    @pragatitalekar8684 Год назад

    4 variable? What to do if two are equal

  • @Btech_Boy
    @Btech_Boy 3 месяца назад

    total 6 nand gates are requied .

  • @atharvagupta9355
    @atharvagupta9355 3 года назад +1

    thank you -from exam center

  • @bijaymahara4484
    @bijaymahara4484 3 года назад

    a combinational circuit has four inputs and two outputs one of the output is high when majority of inputs are high. the second output is high when all inputs are of same type. please solution?

  • @mac2857
    @mac2857 Год назад

    Sir this is dataflow model not gate level

  • @bharatletstalk
    @bharatletstalk 2 года назад +2

    6 two input gate is required

    • @user-bc6ot7nq6o
      @user-bc6ot7nq6o 6 месяцев назад +1

      That's right.If we only use two input nand, there would be 6.

  • @nidamanuribalakrishna3151
    @nidamanuribalakrishna3151 3 года назад +2

    sir i think 4 nand gates required to make that...plz correct if i am wrong

    • @nikhilpillai8053
      @nikhilpillai8053 2 года назад +3

      4 nand is needed but 3 (2input) nand gates only

  • @Anime.army.143
    @Anime.army.143 Год назад

    A bro