If can plz take an initiative to teach embedded coding class from basic levels like simple IC TIMER & Signal based operations.. bcoz here theory is not much useful in practical career except university exams 😊
Ma'am, which all are the three registers in the DMA controller, also will the DMA controller continuously interrupt the CPU till it finishes its function?
No only once it will ask for permission from the CPU then it will control the transaction. Also there are two 16 bit registers that control the DMA process
@@EasyElectronics975 Okay. So there are total of 5 registers inside DMA One containing the source address Next length register, then destination address register, a byte counter and a temporary data register. Is it right Ma'am? Since in different sources I found different working types as well as different number of registers, so it is quite confusing for me😅
![[SFM] Risky Recital](http://i.ytimg.com/vi/RzNkY1_Nk3o/mqdefault.jpg)
Amazing video. Explained so well. Pls make more such videos on embedded topics.
കൊള്ളാം ....നല്ല explanation
It's a nice video ma'am, keep on rocking. But I have 1 doubt. For microfibers with memory mapped I/O, ate DMA controllers required?? Pls help
Here is a doubt
How does the DMA controller assert its control to the CPU without the transaction between IO and memory being completed in burst mode?
If can plz take an initiative to teach embedded coding class from basic levels like simple IC TIMER & Signal based operations.. bcoz here theory is not much useful in practical career except university exams 😊
Ma'am, which all are the three registers in the DMA controller, also will the DMA controller continuously interrupt the CPU till it finishes its function?
No only once it will ask for permission from the CPU then it will control the transaction. Also there are two 16 bit registers that control the DMA process
@@EasyElectronics975 Okay. So there are total of 5 registers inside DMA
One containing the source address
Next length register, then destination address register, a byte counter and a temporary data register. Is it right Ma'am? Since in different sources I found different working types as well as different number of registers, so it is quite confusing for me😅
13:44 😁
Editing mistake
Plz tamil explain pannunga