At least the discrepancy between textbook and practice demonstrates that we aren't living in a simulation. Either that, or there is a very devious and skilful programmer out there in the overworld.
If you suspected power rail problems, did you try using a beefier supply? Also never forget the weird effects stray capacitances can cause when using breadboards. Great to see the waveforms on the 'scope, they kinda made up for the missing schematic that you promised. Of course if part 2 is released today then you won''t have fibbed :)
Hi Julian, love your videos, and great job as always on this one. Do you plan to build the computer on a PCB once the design is final? It would help to clear up any problems with noise and glitches, of course. Also, an old friend and colleague once described the 555 timer IC as the Swiss Army Knife of electronic design, that circuit is useful for so many things even all these years later.
Most switches are break-before-make, which means that when you depress the switch the connection to the common disconnects from the NC pole before connecting to the NO pole. If that didn't happen you would be shorting the NC and NO together which, in your circuit, would short the plus bar to the minus bar. Not good. On your scope you saw the trace go from +5 to +4 then to ground. I think the duration of the +4 was the flight time of the common contact leaving the NC pole until reaching the NO pole.
If you are using the 555 then they need decent decoupling, the CMOS version is more tollerent. The discharge path for the capacitor on pins 1 and 2 seems to be quite long via the switch and long links.
I guess the problem was the discharge pin of the NE555 witch is connected to the trigger and therefore to the switch. Discharge is a output pin and when you pull it to ground or vcc you can actually short it out. When you use the resistors it doesn't pull the discharge too hard to any potential of your supply.
you could save one resistor by wiring the nc and no of the switch hard to their supply lines, but have the resistor in series with the 'wiper' instead...
I'm curious as to what you're doing with pins 4 (reset) and 5 (control voltage) on your 555 timer. The reset pin is normally tied to the + supply in astable mode and control voltage should be decoupled to gnd with a 100n capacitor if unused. Their absence might cause a little instability.
My usual trick of ignoring them! I did try connecting these pins as recommended when I was having the glitching problems, but it didn't make a jot of difference. Decoupling helped a lot, but the biggest improvement was the 1k resistors on the SPDT switch.
It seems odd to me that you're supposed to decouple the 2/3 point on the resistor divider, but not the 1/3 point (to which there's no external connection). I suppose it's because the 2/3 point is routed to an external pin that decoupling is recommended. But like you, I've not had any problems leaving pin 5 disconnected.
Julian Ilett , I've had problems with the timing capacitor's discharge affecting supply rails, but as for pin 5, I say just leave it unconnected and maybe it'll detect the next Wow! signal :)
Every instruction will also contain a jump address. Mostly, this will be the next address in RAM, but it can be any address. That provides a mechanism for unconditional branches (and my setup and loop requirement). For conditional branches, I'll connect one of the high order address pins of the RAM to a flag (latch output).
No - and it's not a counter. But changing the state of a high order address pin on the RAM (A10 for example) causes a jump to the other half of the RAM chip where an alternative piece of code can be.
Sort of. It's driving the doorbell circuit which will continue sounding if the button (or wired connection) is held on, so it requires this circuit to shut the thing off after predetermined time.
At least the discrepancy between textbook and practice demonstrates that we aren't living in a simulation. Either that, or there is a very devious and skilful programmer out there in the overworld.
Yay! I found another breadboard computer video!
classic example of switch "bouncing". You always gotta debounce mechanical switches, especially on old school logic chips.
Before you build your *manual* 555 clocker you need another 555 debouncer. 😂
55 Comments on a 555 Video. I must be on Time.
Great JLBrB Timer Circuit.
👍
God Bless.
If you suspected power rail problems, did you try using a beefier supply? Also never forget the weird effects stray capacitances can cause when using breadboards.
Great to see the waveforms on the 'scope, they kinda made up for the missing schematic that you promised. Of course if part 2 is released today then you won''t have fibbed :)
Four eneloops is beefy enough for a 555 timer. Schematic coming in part 2 (later today).
you are good man. love your video's a lott. keep doing this please
you don't seem to be a bad man either.
iceberg789 thanks 😃
*Delightfull English*
Hi Julian, love your videos, and great job as always on this one. Do you plan to build the computer on a PCB once the design is final? It would help to clear up any problems with noise and glitches, of course.
Also, an old friend and colleague once described the 555 timer IC as the Swiss Army Knife of electronic design, that circuit is useful for so many things even all these years later.
Most switches are break-before-make, which means that when you depress the switch the connection to the common disconnects from the NC pole before connecting to the NO pole. If that didn't happen you would be shorting the NC and NO together which, in your circuit, would short the plus bar to the minus bar. Not good.
On your scope you saw the trace go from +5 to +4 then to ground. I think the duration of the +4 was the flight time of the common contact leaving the NC pole until reaching the NO pole.
+Robert Shaver Now I'm intrigued. Maybe I'll get the scope out again and measure that flight time. Cheers Robert.
I like the trick to remember 10. Shifting the bits to the right by one divides by two so with the 10 trick you can tell five easy.
I think it is about as easy to remember 8+2 = 10
If you are using the 555 then they need decent decoupling, the CMOS version is more tollerent. The discharge path for the capacitor on pins 1 and 2 seems to be quite long via the switch and long links.
I guess the problem was the discharge pin of the NE555 witch is connected to the trigger and therefore to the switch.
Discharge is a output pin and when you pull it to ground or vcc you can actually short it out.
When you use the resistors it doesn't pull the discharge too hard to any potential of your supply.
And while I'm here... I really love your videos and how you do stuff. Very enjoyable indeed.
you could save one resistor by wiring the nc and no of the switch hard to their supply lines, but have the resistor in series with the 'wiper' instead...
I'm curious as to what you're doing with pins 4 (reset) and 5 (control voltage) on your 555 timer. The reset pin is normally tied to the + supply in astable mode and control voltage should be decoupled to gnd with a 100n capacitor if unused.
Their absence might cause a little instability.
My usual trick of ignoring them! I did try connecting these pins as recommended when I was having the glitching problems, but it didn't make a jot of difference. Decoupling helped a lot, but the biggest improvement was the 1k resistors on the SPDT switch.
Yes, the improvement with those 1k resistors was significant. I'm going to have to breadboard this myself now and try it out.
Nick B , pin 5 is tapped off the internal voltage divider resistor chain.
In my experience, leaving it unconnected has zero problems.
It seems odd to me that you're supposed to decouple the 2/3 point on the resistor divider, but not the 1/3 point (to which there's no external connection). I suppose it's because the 2/3 point is routed to an external pin that decoupling is recommended. But like you, I've not had any problems leaving pin 5 disconnected.
Julian Ilett , I've had problems with the timing capacitor's discharge affecting supply rails, but as for pin 5, I say just leave it unconnected and maybe it'll detect the next Wow! signal :)
Maybe the "stepping" has something to do with the microswitch being break-before-make?
Yeah possibly - the 4uS being the period when the common pin is flying between NC and NO.
Clock?, Countdown?
Ah, I see, "The Final Countdown" - (or Count Up) lol
is it posibel to make the 555 timer a pico second timer
Sunday evening shows..
Not sure how you plan on branching with a counter :P
Every instruction will also contain a jump address. Mostly, this will be the next address in RAM, but it can be any address. That provides a mechanism for unconditional branches (and my setup and loop requirement). For conditional branches, I'll connect one of the high order address pins of the RAM to a flag (latch output).
Can you also load a value into that counter then?
No - and it's not a counter. But changing the state of a high order address pin on the RAM (A10 for example) causes a jump to the other half of the RAM chip where an alternative piece of code can be.
I'm not sure I follow, that's definitely a counter!
I'm sure I'll get what you mean when we see the computer fully built
I'm trying to make a circuit that only sends one logical 1 signal when powered on and stays on logical 0 until turned off.
How can I achieve it?
That sounds like a CPU reset circuit
Sort of. It's driving the doorbell circuit which will continue sounding if the button (or wired connection) is held on, so it requires this circuit to shut the thing off after predetermined time.
A monostable multivibrator (another of the 555s modes) should do the trick.
Thanks!
Another question: What about latching circuit? Like, the one you would use in laser tripwire systems.
The 555 again - it does contain a set/reset latch :)
ayes / no?
How are you sir ... can you help me. Assemble ic 74ls164
How is this even a challenge, why not build your computer out of 7400s, this is way to easy for you :D
what is the name of the black box ?with the wires coming out
battery box.
@@robertnussberger2028 sweet
switch bounce
Hi Julian, you said that 10 in binary was 1010, surely that shoild be 0101, your LSB is the led on the right.
10 decimal is definitely 1010 in binary. The least significant digit is always on the right in any number base.
Brian Marshall sorry to spoil your argument but 0101 = D5
probably depends on your background - are big-endian or little-endian?
Stuart Hatto - endian is about the order of bytes, not bits
first
third