Thank you for sharing all this knowledge to us. I have just a single remark: in explanation on MOSFET operation under VDS lower than zero you should disconnect the bulk from the source and leave it floating. As it is now, bulk connected to source, drain may not go below 0.6V because drain-bulk diode will conduct. In ICs is standard practice to leave bulk unconnected or to “soft” connect it via a resistor to all negative voltages on drain. One may talk about “structural” source or drain = device terminal intended to act as source or drain and “functional” source = terminal at lower voltage and “functional” drain = terminal at higher voltage. In MOSFET operation source and drain may switch roles.
Hi , Thanks for comment. Indeed I inadvertently mixed up the Si and GaN symbols, not witching the bulk conction . I guess that most watchers of the video will not notice that as you did 😊. Remaking the video is just too much work. Thanks again.
@@sambenyaakov I love the fact that you talk about state of the art technology from a "research" yet practical point of view and you go deep in the understanding.
Amazing presentation - Im not able to express how greatful Im that you are sharing this. Please please never stop uploading :) This is premium class content!
The problem with parallel diodes is current sharing, especially at 50kHz and higher. To reduce this phenomenon it has to be co-packed with switch in the same case to minimize parasitic induced. ROHM has one SiC MOSFET + SiC SBD in TO-247 on the market
Are GaN devices typically symmetrical or asymmetrical? That is if I were to "accidentally" mix up drain and source on my PCB layout, would the device still function identically in switching application? I found the explanation ranging from 6:50 to 12:00 to be kinda long-winded. if I understood you correctly, the role of drain and source swap when the voltage across the channel is reversed, as I expect. With the continued assertion that V**g**s=0 for a reverse biased HEMT w/o the body diode, it should behave exactly like a normally-biased FET would when the Vds is asserted to zero (shorted) on a MOSFET... That is it would act as a crude zener diode at/around the threshold voltage. I happen to have a large collection of very old (TO-18, 100mA, 25V) 4 terminal MOSFETs that just so happen to feature separate body / bulk connection and source. I have successfully used them on a breadboard bi-symmetrically reversing the role of drain and source. It gives me some ideas for using them as analog switches. Why are these not more common especially in applications like a battery BMS where back to back connected MOSFETs are used as a switch to disable a battery from over-discharging or over-charging? Or even in power electronics where having a symmetrical switch would enable some novel designs? What is the practical difference between enhancement mode GaN HEMT and depletion mode HEMT w/ Si cascode MOSFET? I've only looked at a couple devices so far and it seems the GaN eHEMT has a very low threshold voltage and may require negative gate drive to ensure it stays off while the cascode MOSFET variety features a more typical Si behavior and can act as a drop-in replacement for typical Si devices, but has slightly worse characteristics than a pure eHEMT or dHEMT With the emergence of GaN and the far superior performance at least on paper, is there still a place for the SiC which is still proving to be cost prohibitive (at least to me 😛) Sorry for all the questions, I regained interest in making my LLC converter design I started at the beginning of this year LOL. And was looking into how to make a bridgeless PFC. And yeah the control for that cursed thing is very tricky indeed!
1.The ones I know are asymmetrical. 2. Watch again😊 3. The separate body terminal is real not useful. You can get by without it. Tis is the reason , I guess, they are not popular. 4. The E D mode conduct with Vgs=0 very dangerous and inconvenient, requiring a negative bias to block. 5. For high voltage the SiCs are still superior. The GaNs need sometime to catch up. If you have not noticed, nobody was able to demonstrate a GaN inverter for high voltage/power EV motor.
Regarding using GaN in reverse operation. Does it mean that we can drive it through Gate - Drain? If we put Gate - Drain 0V, it will stop conducting, right?
12:00 I haven't get the last part of the video, yet, but if Vgd exceeds the threshold, Rds which was huge before (when the transistor was blocking) falls to something drops to like 1 milli-ohm. So, unless you have 6000 A through it, you won't be able to sustain a drop of 6V from Vd to Vs, with Vds = Rds * I. So, with no sustained Vgd of 6 Volt, will we not get a system with very low current, less than 1mA ?
Hello Sir, It was an excellent video for me as I have just entered the domain of WBG devices. However, I had two queries. 1. As we see in the Id_Vds characteristics, at Vgs = 0, the device is conducting both in the first and third quadrant. Then why do we bother to provide a even more negative gate to source voltage, as I see that applying more Vgs negative is causing more Vds to be dropped and also reduces current carrying capability? Does it improve anyway the conduction losses in reverse direction? I think what I am trying to ask is whether providing a even more negative voltage is advantageous in any way? 2. If I want to turn off the D mode GAN FET then what do I have to do as applying a negative voltage is causing conduction in the reverse direction also?(so it is not "OFF" as for that matter). Thanks.
Thanks for comment. 1. The purpose of a larger negative voltage is to protect against the "Miller spike" 2. There is no way to block reverse conduction. This is similar to a Si MOSFET only that the voltage drop is not of a single diode
But this would also mean that in revers the GaN does sometimes operate in the Linear Region, do GaN also have problems like Mosfets with Drain current focusing? And also if you have devices in parallel the TK could distribute the current over the diode not to all devices
Hi Heinrich, thanks for comment. In switch mode operation, when heavily driven GaN transistors do not really operate in the linear region and can be considered just as a conductor slab of Rds(on). However when stressed with very heavy current they may move to the linear region. AS for drain current focusing, I don't know.
But the Diode effect is a linear mode of the GaN(it is not completely on). Yes im more concerned about those unwanted effects that comes from how the semiconductor is impemented. You are rigth theoretically it is just a conductor slab of Rds(on) but that is true for all Fets. But there are differences in like TrenchFets or HexFets... like the Spirito-Effect i mentioned. So far i found not much information about that.
So, for high-ish current/voltage synchronous rectifiers or buck converters, it may still be beneficial to place a parallel SiC diode across the GaN part to help with loss during dead time? How about a GAN diode ! Can they even make a GaN diode by itself ?
No no need. The reverse conducting GaN will turn off relatively smootly (we are going to present a conference paper on that shortly). AS fa as I know GaN diodes are not available.
Can you explain something about the strange effects of early GaN-(HV)-Mosfets? Like the current collapse, stored charge over days, etc. I was evaluating early 600V GaN(2013) and started to hate this things because not relaible. Working with normaly-on is pain and the early cascodes also not stable. Since i now work on 3-phase tens of kW SiC is the main component i use. So i was not involved of the transition if GaN from engineering samples to a reliable switch for MP. So review what was done to make HV-GaN stable and usable like today would be very interesting. Best greetings form Austria!
Hi, Thanks for comment. For low voltage GaN transistors seem to have reached a mature state. HV high power GaN are to me experience still in the beta stage. Some applications (APFC) seem to be working OK but I have not seen yet a reliable high power GaN motor drive inverter. But it will sure come.
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Beautiful instant in which I realized the effect!! Thank you professor! Keep sharing your knowledge with us.
Thanks
Thank you for sharing all this knowledge to us. I have just a single remark: in explanation on MOSFET operation under VDS lower than zero you should disconnect the bulk from the source and leave it floating. As it is now, bulk connected to source, drain may not go below 0.6V because drain-bulk diode will conduct. In ICs is standard practice to leave bulk unconnected or to “soft” connect it via a resistor to all negative voltages on drain. One may talk about “structural” source or drain = device terminal intended to act as source or drain and “functional” source = terminal at lower voltage and “functional” drain = terminal at higher voltage. In MOSFET operation source and drain may switch roles.
Hi , Thanks for comment. Indeed I inadvertently mixed up the Si and GaN symbols, not witching the bulk conction . I guess that most watchers of the video will not notice that as you did 😊. Remaking the video is just too much work. Thanks again.
Excellent presentation, thanks for this high quality power electronics contents
😊
@@sambenyaakov I love the fact that you talk about state of the art technology from a "research" yet practical point of view and you go deep in the understanding.
👍
Amazing presentation - Im not able to express how greatful Im that you are sharing this. Please please never stop uploading :) This is premium class content!
Hi Stanislav, Thanks for taking the time to write the nice words. Comments like yours keep me going.
That was so great. appreciate a lot.
Thanks
The problem with parallel diodes is current sharing, especially at 50kHz and higher. To reduce this phenomenon it has to be co-packed with switch in the same case to minimize parasitic induced. ROHM has one SiC MOSFET + SiC SBD in TO-247 on the market
Thanks for pointer Andrii. Indeed a good way to go.
Nexperia has GAN039 series as well, integrated MOS for switching
Very helpful indeed thank you!🙏🏼
🙏😊
Are GaN devices typically symmetrical or asymmetrical? That is if I were to "accidentally" mix up drain and source on my PCB layout, would the device still function identically in switching application?
I found the explanation ranging from 6:50 to 12:00 to be kinda long-winded. if I understood you correctly, the role of drain and source swap when the voltage across the channel is reversed, as I expect. With the continued assertion that V**g**s=0 for a reverse biased HEMT w/o the body diode, it should behave exactly like a normally-biased FET would when the Vds is asserted to zero (shorted) on a MOSFET... That is it would act as a crude zener diode at/around the threshold voltage.
I happen to have a large collection of very old (TO-18, 100mA, 25V) 4 terminal MOSFETs that just so happen to feature separate body / bulk connection and source. I have successfully used them on a breadboard bi-symmetrically reversing the role of drain and source. It gives me some ideas for using them as analog switches. Why are these not more common especially in applications like a battery BMS where back to back connected MOSFETs are used as a switch to disable a battery from over-discharging or over-charging? Or even in power electronics where having a symmetrical switch would enable some novel designs?
What is the practical difference between enhancement mode GaN HEMT and depletion mode HEMT w/ Si cascode MOSFET? I've only looked at a couple devices so far and it seems the GaN eHEMT has a very low threshold voltage and may require negative gate drive to ensure it stays off while the cascode MOSFET variety features a more typical Si behavior and can act as a drop-in replacement for typical Si devices, but has slightly worse characteristics than a pure eHEMT or dHEMT
With the emergence of GaN and the far superior performance at least on paper, is there still a place for the SiC which is still proving to be cost prohibitive (at least to me 😛)
Sorry for all the questions, I regained interest in making my LLC converter design I started at the beginning of this year LOL. And was looking into how to make a bridgeless PFC. And yeah the control for that cursed thing is very tricky indeed!
1.The ones I know are asymmetrical.
2. Watch again😊
3. The separate body terminal is real not useful. You can get by without it. Tis is the reason , I guess, they are not popular.
4. The E D mode conduct with Vgs=0 very dangerous and inconvenient, requiring a negative bias to block.
5. For high voltage the SiCs are still superior. The GaNs need sometime to catch up. If you have not noticed, nobody was able to demonstrate a GaN inverter for high voltage/power EV motor.
Great lecture, thank you.
Thanks. Welcome to watch other videos in my channel/
Great lecture, thank you very much
😊👍
Regarding using GaN in reverse operation. Does it mean that we can drive it through Gate - Drain? If we put Gate - Drain 0V, it will stop conducting, right?
No,j because Vgs is high. For cut off you need both voltages belo threshold.
12:00 I haven't get the last part of the video, yet, but if Vgd exceeds the threshold, Rds which was huge before (when the transistor was blocking) falls to something drops to like 1 milli-ohm. So, unless you have 6000 A through it, you won't be able to sustain a drop of 6V from Vd to Vs, with Vds = Rds * I. So, with no sustained Vgd of 6 Volt, will we not get a system with very low current, less than 1mA ?
See ruclips.net/video/QNHzaiWCUeE/видео.html
Hello Sir, It was an excellent video for me as I have just entered the domain of WBG devices. However, I had two queries.
1. As we see in the Id_Vds characteristics, at Vgs = 0, the device is conducting both in the first and third quadrant. Then why do we bother to provide a even more negative gate to source voltage, as I see that applying more Vgs negative is causing more Vds to be dropped and also reduces current carrying capability? Does it improve anyway the conduction losses in reverse direction? I think what I am trying to ask is whether providing a even more negative voltage is advantageous in any way?
2. If I want to turn off the D mode GAN FET then what do I have to do as applying a negative voltage is causing conduction in the reverse direction also?(so it is not "OFF" as for that matter).
Thanks.
Thanks for comment.
1. The purpose of a larger negative voltage is to protect against the "Miller spike"
2. There is no way to block reverse conduction. This is similar to a Si MOSFET only that the voltage drop is not of a single diode
But this would also mean that in revers the GaN does sometimes operate in the Linear Region, do GaN also have problems like Mosfets with Drain current focusing? And also if you have devices in parallel the TK could distribute the current over the diode not to all devices
Hi Heinrich, thanks for comment. In switch mode operation, when heavily driven GaN transistors do not really operate in the linear region and can be considered just as a conductor slab of Rds(on). However when stressed with very heavy current they may move to the linear region. AS for drain current focusing, I don't know.
But the Diode effect is a linear mode of the GaN(it is not completely on). Yes im more concerned about those unwanted effects that comes from how the semiconductor is impemented. You are rigth theoretically it is just a conductor slab of Rds(on) but that is true for all Fets. But there are differences in like TrenchFets or HexFets... like the Spirito-Effect i mentioned. So far i found not much information about that.
So, for high-ish current/voltage synchronous rectifiers or buck converters, it may still be beneficial to place a parallel SiC diode across the GaN part to help with loss during dead time? How about a GAN diode ! Can they even make a GaN diode by itself ?
No no need. The reverse conducting GaN will turn off relatively smootly (we are going to present a conference paper on that shortly). AS fa as I know GaN diodes are not available.
GaN diodes are available, but they are called LEDs and may not have the characteristics you want for this application :-)
At least you might see when it conducts ! I thought that LEDs were Gallium Arsenide but I guess that they are actually GaN
Do IGBTs have this same characteristic ?
Great explanation, Sam.
IGBT is a bi polar device entirely different. In
ruclips.net/video/tfqOfJw_GWs/видео.html
there is some comparison
Can you explain something about the strange effects of early GaN-(HV)-Mosfets? Like the current collapse, stored charge over days, etc. I was evaluating early 600V GaN(2013) and started to hate this things because not relaible. Working with normaly-on is pain and the early cascodes also not stable. Since i now work on 3-phase tens of kW SiC is the main component i use. So i was not involved of the transition if GaN from engineering samples to a reliable switch for MP.
So review what was done to make HV-GaN stable and usable like today would be very interesting.
Best greetings form Austria!
Hi, Thanks for comment. For low voltage GaN transistors seem to have reached a mature state. HV high power GaN are to me experience still in the beta stage. Some applications (APFC) seem to be working OK but I have not seen yet a reliable high power GaN motor drive inverter. But it will sure come.
AFGHL50T65SQDC. IGBT copacked with SiC diode.
Thanks for pointer
I could not say it better than another viewe already commented Stanislav Subrt.
Thanks Hamid
Excellent presentation, thanks for this high quality power electronics contents
Thanks