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Best explanation on characteristics of logic family available on youtube
Thanks 😊
The best explanation to clear basics. Genuinely appreciate the content and explanation, Ma'am
Thanks Anshul
Excellent Explanation .Really your video is helpful for me.Thank you mam🙏
Thanku so much if u like my video then keep watching 😍
Bahut achha samjhate ho mam
Thanks
Two days before exam 😊 Thank you Ma'am 🎉
Good luck for exam
1 hour before exam 🗿
Give a benefit for last revision 😌Help full ❤️
Thanku so.much , keep watching
It is very helpful for us 👌
Thank you 😊
Good learning mam Thanks
Thanku for ur valuable feedback Keep watching 😊😊
Thank you so much ma'am. Your video was so helpful for me
Thanku so muchKeep watching
Juth kyu bol raha bhai
Nicely explained..
thank you mam for all your erffort
Thanku for watching Hammed .
Thank you girl🎉
Well explained ✨
Thanks dear
Thankyou so much mam 😇
Thanku so much ma'am
Most welcome Aneeta, Keep watching
2:35 here tphl is propogation delay from high to low but the signal is going low to high logic mam
Thank you ma'am
Most welcome
It's amazing
Thanku so much
Thank you ❤😊😊
Ma'amWhat is full form of ckl's in (figure of merit)??
Thank you maam❤
Ma'am why low value is desirable for figure of merit? since it is the circuit's ability to tolerate the noise....It should be high
Figure of merit = propogation delay x power dissipation Both should be low so that we get output faster
Mam please provide playlist of this unit digital logic family
All 5 units are in one playlist
Thanks a lot mam
Love u maim
Thank you mam
Thanku ashvani
thank you.
Noice!
? It's noise or anything else
Can you provide this subject notes ma'am
Gujarati ma bolo ne medam
Gujrati nahi aati
Best explanation on characteristics of logic family available on youtube
Thanks 😊
The best explanation to clear basics. Genuinely appreciate the content and explanation, Ma'am
Thanks Anshul
Excellent Explanation .Really your video is helpful for me.
Thank you mam🙏
Thanku so much if u like my video then keep watching 😍
Bahut achha samjhate ho mam
Thanks
Two days before exam 😊
Thank you Ma'am 🎉
Good luck for exam
1 hour before exam 🗿
Give a benefit for last revision 😌
Help full ❤️
Thanku so.much , keep watching
It is very helpful for us 👌
Thank you 😊
Good learning mam
Thanks
Thanku for ur valuable feedback
Keep watching 😊😊
Thank you so much ma'am. Your video was so helpful for me
Thanku so much
Keep watching
Juth kyu bol raha bhai
Nicely explained..
Thanks
thank you mam for all your erffort
Thanku for watching Hammed .
Thank you girl🎉
Well explained ✨
Thanks dear
Thankyou so much mam 😇
Thanku so much ma'am
Most welcome Aneeta, Keep watching
2:35 here tphl is propogation delay from high to low but the signal is going low to high logic mam
Thank you ma'am
Most welcome
It's amazing
Thanku so much
Thank you ❤😊😊
Ma'am
What is full form of ckl's in (figure of merit)??
Thank you ma'am
Thank you maam❤
Thanks
Ma'am why low value is desirable for figure of merit?
since it is the circuit's ability to tolerate the noise....It should be high
Figure of merit = propogation delay x power dissipation
Both should be low so that we get output faster
Mam please provide playlist of this unit digital logic family
All 5 units are in one playlist
Thanks a lot mam
Love u maim
Thank you mam
Thanku ashvani
thank you.
Thank you mam
Noice!
? It's noise or anything else
Can you provide this subject notes ma'am
Gujarati ma bolo ne medam
Gujrati nahi aati