Hopper on the MECB 6502 - MC6821 PIA
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- Опубликовано: 6 сен 2024
- Learning to program the Motorola 6821 on the MECB I/O board with the 6502.
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Sample code from this video:
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Nicely explained. Although I’m not clear on what defined the entry address with your Hopper Assembler? Was it E000, simply because of the ROM_8K define?
i.e. How do you assemble code for other than the start of ROM?
Note that the primary differences between PIA ports is that Port A has internal pull-up resistors, whilst Port B is high impedance on input (tri-state capable) and also has higher current drive capability on output. Neither have latching inputs.
Note also, the current WDC W65C21N PIA is plug-in replaceable for the MC6821.
My Hopper 6502 Assembler is bit limited when it comes to positioning of the output : only the upper 8K or 16K of the address space for ROM in these cases. That said, it always puts constants at the start address of the ROM. Currently I have a 'reserve' directive for when I/O space may overlap with the ROM. During code generation 'reserve' emits NOPs for the I/O space but I have only made it aware of overlapping with method code and not constants (so far). For this reason, I put the IO space at 0xF000 (rather than 0xE000 where the constants are) for the 8K ROM (and I just leave it there for the 16K version so that I don't have to change the DIP switch settings).
More about the WD replacements:
"The W65C21N is plug replacement of NMOS and CMOS 6521 and 6821 devices with current
limiting resistors"
"The W65C21S is lower power, faster and direct drive outputs with no current limiting resistors."
The "latch" difference between ports A and B is described on page 17 better than I could ever hope to explain (when reading port A, you get the values from the lines irrespective of which are outputs and which are inputs, when reading from B, you 'correctly'' get the values for pins set to outputs from ORB when reading all pins - a peculiar difference indeed).
www.westerndesigncenter.com/wdc/documentation/w65c21.pdf
@@biggertigger An interesting difference, which seems intent on correcting a potential situation with the original MC6821 PIA. In the original 6821 PIA case, reading the value of an Output pin on Port B could potentially return a different value than the Output register bit, in the case where the port Pin is excessively loaded, pulling it low (or excessively pulled high). i.e. The read value of an Output pin is always the immediate value on the port Pin! Mind you, I've never seen this as an issue, as typically I'm only interested in reading an Input pin value, and as such I would typically only test the relevant Input bit, and not make any assumptions about the read value of Port pins programmed as Outputs. Good to know about this difference though! 🤓