Superscalar Processor | Superscalar Architecture in Computer Architecture | Superscalar Pipeline

[@Comrevo]

Find all HPC (High Performance Computing) / Parallel Computing videos in following link:
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[@adityagitte]

Clear and Concise. The clock diagram was very helpful.

[@Comrevo]

Thank you🙏🙏

[@omanshsharma6796]

Thank you sir, brilliant explanation!!

[@Comrevo]

Most welcome🙏🙏

[@hadeedfatema3639]

This video is so helpful, Thankyou for uploading it :)

[@Comrevo]

Most Welcome🙂🙂

[@vinothenimalar4794]

Thank you so much for clear explanation

[@Comrevo]

Most Welcome🙂🙂

[@veenaas4837]

Very helpful sir,Thank you so much

[@Comrevo]

Most Welcome🙂🙂

[@shrikantchanne1]

F = Fetch, D = Decode, E = Excute and W = Write back

[@Comrevo]

👍👍

[@subrahmanyadheeraj5206]

tq.sir

[@Comrevo]

Most Welcome🙏🙏

[@theciya.s5235]

sir you will tell in first starting of explanting superscalar (instruction should be in independented) but in end of the section limination of superscalar u will tell get affected by dependency between instruction can you explain about this doubt sir

[@theciya.s5235]

supersclar is dependency or independency

[@Comrevo]

For Superscalar architecture, it is better to have independent instructions. But, if instructions are dependent, then it reduces the performance of superscalar architecture.

[@satyavanikalla1900]

Hello sir i need your help sir
Im currently a student at RGUKT . we want to do a project related to RISC-V processor if you dont mine could you please help us sir

[@nirannjanss6273]

bro u r good in teaching but you are blabbering plz try to recover this in your further videos..

[@Comrevo]

Sure.. Thank you🙏🙏

[@NandkishorKrsahCS]

bro , have you made notes of this subject? would you like to share with me?