Digital-on-top Physical Verification (Fullchip LVS/DRC) - Part 1

Поделиться
HTML-код
  • Опубликовано: 15 сен 2024

Комментарии • 11

  • @thahseenaha1080
    @thahseenaha1080 4 года назад +2

    Thank you so much sir. Being a beginner in this area ,your lectures are helping me a lot. To find lectures related to these topics ,that too at free of cost is not at all easy.Thank you so much for your kindness.

    • @AdiTeman
      @AdiTeman  3 года назад +1

      You are most welcome

  • @ethanking123
    @ethanking123 3 года назад

    Thank you so much for this course as well as other tutorials regarding EDA Dr. Teman, you're amazing.

    • @AdiTeman
      @AdiTeman  3 года назад

      You're very welcome!

  • @lalithsamanthapuri2055
    @lalithsamanthapuri2055 3 года назад +4

    Hi Adi Teman, why you took long time to upload new videos..! Please do more videos like this in future. We love your videos from India :)

    • @AdiTeman
      @AdiTeman  3 года назад

      Thanks. Lots of work lately. Hopefully at some point I will have more time and will make them more frequently :)

  • @taruny5440
    @taruny5440 3 года назад +1

    Nice sir 🤗 keep going

    • @AdiTeman
      @AdiTeman  3 года назад

      Thank you, I will

  • @justforstudy1576
    @justforstudy1576 3 года назад

    Difference between Design rule check and Electrical rule check

    • @AdiTeman
      @AdiTeman  3 года назад

      Hi. I believe this is elaborated upon during the lecture series - I suggest to watch all the sections and get the full explanation. But, in general, DRC are rules for manufacturing. The fab cannot (or, at least, will not) manufacture polygons that don't meet the DRC requirements. ERC, on the other hand, are more of a sanity check that complements LVS, making sure you don't have shorts or opens in your design and that your bulks are connected.

    • @justforstudy1576
      @justforstudy1576 3 года назад +1

      @@AdiTeman thank you ✨