Thanks for this fantastic lecture on LDO. But there is one point I need help understanding. At 6:00, you said the effect of this extra parasitic is to increase the impedance. How to understand it is if the impedance is increased, the pole frequency will be reduced, but it looks like the pole frequency is extended. Thanks for your sharing, and I will be grateful if you can explain it more profoundly.
Hi Fen, not all impedances cause pole frequency to reduce. Some impedances can cause additional zeros which help to extend the frequency range. Consider capacitor ESR and ESL. These impedances cause net impedance seeing into capacitor to increase but instead of reducing pole frequency, these extra impedances cause additional zeros which arrest the fall in gain and widen frequency range.
Awesome lecture. I haven't designed any off-chip cap-based regulators-what is the best reference to understand this? Look forward to your amazing next video sir!!
thanks you're back sir.Please post regular videos, it really helped me
Thanks for this fantastic lecture on LDO. But there is one point I need help understanding. At 6:00, you said the effect of this extra parasitic is to increase the impedance. How to understand it is if the impedance is increased, the pole frequency will be reduced, but it looks like the pole frequency is extended. Thanks for your sharing, and I will be grateful if you can explain it more profoundly.
Hi Fen, not all impedances cause pole frequency to reduce. Some impedances can cause additional zeros which help to extend the frequency range. Consider capacitor ESR and ESL. These impedances cause net impedance seeing into capacitor to increase but instead of reducing pole frequency, these extra impedances cause additional zeros which arrest the fall in gain and widen frequency range.
Awesome lecture. I haven't designed any off-chip cap-based regulators-what is the best reference to understand this? Look forward to your amazing next video sir!!
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