It's hardcoded in the FPGA's Verilog: initial begin $readmemh("rom.txt", fixed_memory); end The Makefile has some recipes for building specific test programs and generating the rom.txt from it. I could add a bootloader and read from UART, but meh... :)
wow what an entresting project!
I'd like to see it work more in depth, good job!
Thanks!!
That’s cool, how did you flash the assembly onto the controller?
It's hardcoded in the FPGA's Verilog:
initial begin
$readmemh("rom.txt", fixed_memory);
end
The Makefile has some recipes for building specific test programs and generating the rom.txt from it. I could add a bootloader and read from UART, but meh... :)