Switches to CPUs: Ripple Counter
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- Опубликовано: 1 июл 2024
- We make a D-type flip-flop then convert it into a ripple counter.
Part 1: Binary numbers - • Digital Logic Explained
Part 2: 2-input gates - • Switches to CPUs: 2 In...
Part 3: Relay based logic - • Switches to CPUs: Rela...
Part 4: Latches - • Switches to CPUs: Rela...
Part 5: SR Latch - • Switches to CPUs: Set ...
Part 6: Wired OR gates - • Switches to CPUs: Wire...
Part 7: Flip Flops - • Switches to CPUs: Flip...
I really liked the explanation! Makes understanding these circuits so much easier
Glad it was helpful!
хорошая работа, отличный контент, спасибо.
Thanks for the feedback.
so that's why they're called ripple counters. I thought they might be used to counter the ripple on a signal (like AC on top of DC), but that never made any sense
Yep, they are much easier to implement than synchronous counter where the outputs all change at [exactly] the same time.
Great explanation.
Glad it was helpful!
Another good video!
(5:51) Where's the data line?
(9:04) Ah. You showed the toggle flip-flop at 5:51, not the data flip-flop.
(9:21-9:40) The top line is still set and the bottom line is still reset on the internal latches, but the relays used for set and reset are swapped compared to the previous video. This does mean the data flow matches the design you showed with gates better. However, it also means the internal D-type latches have _D-bar_ inputs, not D inputs. (There are other ways to rectify this, but I think this way requires the fewest changes.)
And now for some fun facts/over-analysis:
As for changes between the logic-gate design and relay design, you still have the outputs of the latches between the OR gates and their inverters; the outputs are just buffered this time. Additionally, the gate design uses an SR-type latch as the follower, whereas the relay design uses a D-type latch as the follower.
Thanks.
[(5:51) Where's the data line?]
It doesn't really have a data input from an external source. Data is the input to the leftmost relay coil.
[(9:04) Ah. You showed the toggle flip-flop at 5:51, not the data flip-flop.]
No, T flip flips have a T input that gates the clock. It confuses the issues so i decided not to include it.
The relays are meant to be equivalent functionally, but not an exact gate for gate copy [i don't think i ever said they were exactly the same - correct me if i'm wrong]. Arguably, the relays act more as multiplexors [and 1:2 decoders] than anything else.
This is a beginners tutorial, so i mainly want to get the ideas across.
@@DrMattRegan Huh. You're right about T flip-flops. I blame my RadioShack Electronics Learning Lab for calling the configuration at 6:13 a "toggle flip-flop" (and also that most Minecraft redstone "toggle flip-flop" designs aren't actually clocked) for me getting that wrong.
Good video. I like how you showed how yhe D flip flop is triggered on the rising edge. Are you going to post thar schematic diagram somewhere? If so a link in the description would be great.
Hi Martin. I haven't done a proper schematic yet, but in the next video i'm planning to introduce the logic to restrict one count from 0..9 and another count to 0..5, so i'll see if i can put out a schematic with that.